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Registered: ‎05-16-2018

Video Processing Subsystem (2.1) - Issue using Zoom and PiP Feature of VPSS

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Hello everybody,

I got two general questions before I come to my problems:

1.) Is it possible to implement a smooth zoom function (like smartphone cameras, small delay, no video interruption, ..) using the Xilinx VPSS 2.1?

2.) Is it possible to show a zoomend PiP video of the full video stream?

We really need to know this, because we need this features for a new product this year and FPGA logic ressources are limited (Zynq7020).

 

Now to my problems:

I use the VPSS in full-fledged mode with integrated DMA. Scaling and other functions work fins so far.

1.) Im not able to zoom video without interruption:

It seems I need to call XVprocSs_SetSubsystemConfig() to get any window update. But if I call this function I got a black screen for some seconds, before showing the updated window. 

When I try to use XVprocSs_UpdateZoomPipWindow(), I got no effect or corrupt video data (more images).

I found some hint in the xilinx xvprocss libary for the zoom function in the vertical blanking:

* @note User must call XVprocSs_ConfigureSubsystem() for change to take effect
* This call has not been added here such that it provides an opportunity
* to make the change during vertical blanking at system level. This
* behavior will change once shadow register support is available in
* sub-core IP's
* This function is not applicable in Subsystem Stream Mode Configuration
*
******************************************************************************/
void XVprocSs_SetZoomMode(XVprocSs *InstancePtr, u8 OnOff)

Now my question: How does I make teh change during the blanking phase? 

 

2.) Im not aple to show a zoomed cut off of the actual video stream as PiP (Background should be the default full video stream.)

If I call:

XVprocSs_SetPipMode(p_periphs_inst->p_vpss_inst, ON);
XVprocSs_SetZoomPipWindow(p_periphs_inst->p_vpss_inst, XVPROCSS_PIP_WIN, &winPiP); // mode

XVprocSs_UpdateZoomPipWindow(p_periphs_inst->p_vpss_inst);
XVprocSs_SetSubsystemConfig(p_periphs_inst->p_vpss_inst);

I always get a PiP of the video stream on a black background. No Default video Stream anymore.

 

You can see my actuall vpss functions for zoom and PiP in the file below. 

Does anybody got some hint for me, how to realize this zoom and PiP functions? Or is it not possible with only the VPSS core?

We stuck here and urgently need help. Thank you very much in Advance!

 

Best regards,

André

 

 

 

 

 

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Moderator
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Registered: ‎11-09-2015

Hi @andre_schmidt 

This is not possible to change the VPSS configuration on the fly. If you refer to the example application, each time the configuration change the VPSS needs to be reseted.


@andre_schmidt wrote:

Now my question: How does I make teh change during the blanking phase? 


Note that the VPSS is working on the AXI4-Stream domain. There is no notion of blanking.

The only solution I see, which is not easy, is to create some logic which detects the frames boundary before and after the VPSS. You send only one frame to the VPSS (then you stop the input stream with your custom logic) and you wait to it to complete (the custom logic would need to count the number of tlast out of the VPSS). Then when the VPSS completes, you reset the VPSS and change the configuration.

Because you are in the AXI4-Stream domain, the VPSS can (way) run faster than the video clock thus you might be able to produce enough data to keep up with the stream


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Registered: ‎11-09-2015

Hi @andre_schmidt 

This is not possible to change the VPSS configuration on the fly. If you refer to the example application, each time the configuration change the VPSS needs to be reseted.


@andre_schmidt wrote:

Now my question: How does I make teh change during the blanking phase? 


Note that the VPSS is working on the AXI4-Stream domain. There is no notion of blanking.

The only solution I see, which is not easy, is to create some logic which detects the frames boundary before and after the VPSS. You send only one frame to the VPSS (then you stop the input stream with your custom logic) and you wait to it to complete (the custom logic would need to count the number of tlast out of the VPSS). Then when the VPSS completes, you reset the VPSS and change the configuration.

Because you are in the AXI4-Stream domain, the VPSS can (way) run faster than the video clock thus you might be able to produce enough data to keep up with the stream


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Registered: ‎05-16-2018

Hello Florent!

Thank you for your reply!

What about the note in the xvprocss.c, to make the change during vertical blanking at system level? Sounds like the is a way to update on the fly!?

In AXI4-Stream TUSER mark the start of a new frame and you also can use some interrupts of another core like VMIX or VIDEO-IN-TO-AXI to send a com,mand in the vertical blanking, or not?

/*****************************************************************************/
/**
* This function configures the video subsystem to enable/disable ZOOM feature
* If ZOOM mode is set to ON but user has not set window coordinates then
* quarter of input stream resolution at coordinates 0,0 is set as the default
* zoom window
*
* @param InstancePtr is a pointer to the Subsystem instance to be worked on.
* @param OnOff is the action required
*
* @return None
*
* @note User must call XVprocSs_ConfigureSubsystem() for change to take effect
* This call has not been added here such that it provides an opportunity
* to make the change during vertical blanking at system level. This
* behavior will change once shadow register support is available in
* sub-core IP's
* This function is not applicable in Subsystem Stream Mode Configuration
*
******************************************************************************/
void XVprocSs_SetZoomMode(XVprocSs *InstancePtr, u8 OnOff)

 

Thank you very much in advance!

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Registered: ‎11-09-2015

HI @andre_schmidt 

I will cross-check with development but I think on-the-fly changes is not implemented yet.

Note that here this is just to enable/disable the zoom window not to change the zoom settings.

Yes you can always use interrupts from other IP but I believe you need to make sure you stop the frame before it arrives in the VPSS.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Hi Florent!

This would be greate, because we assumed in this project that a stepless zoom and PiP can be realized with the VPSS.

I think

If it's not possible, this would be a huge problem for our project, because we want to use a single Zynq7020 without a DSP.

In xApp1291 eventhndlr.c you can find the following c code for a widow move during vsync:

case XEVENT_SYS_VSYNC:
if((XOutss_GetActiveSink(pOutss) == XOUTSS_SINK_HDMI_TX) &&
(procEvent == XEVENT_SYS_VSYNC)) {

XEvnthdlr_ClearEvent(pEvent, procEvent);
if(XOutss_IsVsyncEvntPend(pOutss)) {
/* If Zoom/Pip mode is ON and window is moved, update during
* VSync
*/
XVprocSs_UpdateZoomPipWindow(pVprocss);
XOutss_SetVSyncEvntPend(pOutss, FALSE);
}
} else { //Interrupting source and selected source are different - ignore event
XEvnthdlr_ClearEvent(pEvent, procEvent);
}
break;

 

Please check if there is any possibilty to do a stepless zoom and PiP with the VPSS.

 

Thank you very much in advance!

 

Best regards,

André

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Registered: ‎05-16-2018
If I reset the VPSS, I always will get a black screen, if I dont have a buffer behind the VPPS or not?
Maybe it's bad to use the VPSS reset output and connect it to the IPs from the video pipeline too.
If I use another reset, I maybe can avoid these black screens.
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Registered: ‎11-09-2015

Hi @andre_schmidt 

I checked with development and you have to reset the core each time you want to apply different scaling parameters.

Also, the VPSS does not allow to do PiP with the same image on the background. The background will only be a single colour.

To avoid the black screen between each zoom, you would need to have a frame buffer after the VPSS this way it can repeat the last frame if the VPSS is not fully ready


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Hi @florentw 

this means it's Picture on Background and not picture in picture!?

How could we solve this issue? Later we want to run a linux application.

The only way to have the features we need is to create our own video processing system with scaler, csc, PiP, Zoom, etc. and write a linux application to control and update this IP cores? is it correct and possible?

Thank you very much in advance for you input.

André

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Registered: ‎11-09-2015

HI @andre_schmidt 


@andre_schmidt wrote:

this means it's Picture on Background and not picture in picture!?

[Florent] - Well Picture in Picture can mean a lot of thing. But yes this is only the stream on a background

How could we solve this issue? Later we want to run a linux application.

The only way to have the features we need is to create our own video processing system with scaler, csc, PiP, Zoom, etc. and write a linux application to control and update this IP cores? is it correct and possible?

[Florent] - You can use a Video Mixer to incrust the scaled output from the VPSS to another stream
But if you want to do on-the-fly scaling it might be better to design your own IP

Thank you very much in advance for you input.

André


 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Ok thank you @florentw !

So we will try to build our own video processing system using the xilinx VPPS Sub IPs (CRC, Scaler, ...) and our own IPs (vBlank detection, ...).

We wiill duplicate the video stream and use video mixer, which is already implemented, to generate a PiP Zoomed Video Stream.  

I think modify the xilinx VPPS libary sources could not fix these issus!? 

 

 

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HI @andre_schmidt 

Officially you should recreate everything. Using the sub-IPs of the VPSS is not supported by Xilinx

And no this is a HW limitation so the SW will not be able to fix this


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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@florentw ,

 

what I mean with Sup IPs from VPSS, is the "VPPS CRC only" and "VPSS Scaler only" setting.

Is this not supported?

 

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HI @andre_schmidt 

Ok. If you use the VPSS in scaler only or CRC only it is fine and supported


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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