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s.beigmohammadi
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Registered: ‎05-27-2019

Video Processing Subsystem IP in reconfigurable partitions

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Hi,
 

Can I use Video Processing Subsystem as a/part of a reconfigurable module (RM) for a reconfigurable partition (RP)? I'm using the ZCU106 board and trying to implement a partially reconfigurable video pipeline. One of the possible processing elements in the pipeline is the video processing subsystem in scale-only mode.

The Video Processing Subsystem can only be instantiated inside a block design. However, it seems that a block design cannot be present in an RM. Would switching to non-project mode help me resolve this issue?

Thanks,

Siamack

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hongh
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Registered: ‎11-04-2010

Please try to use non-project and generate DCP for static and RM respectively

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hongh
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Registered: ‎11-04-2010

Please try to use non-project and generate DCP for static and RM respectively

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s.beigmohammadi
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Registered: ‎05-27-2019

Thanks for your response @hongh! I was able to implement it in non-project mode

Just out of curiosity, does this mean that the VPSS cannot be instantiated in a reconfigurable module with the project-based DFX flow?

 

 

 

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s.beigmohammadi
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Registered: ‎05-27-2019

I was able to implement this in project mode as well. So the solution is synthesizing the block design that includes the VPSS into a design checkpoint (DCP). Then, you still have the freedom of choosing the project or non-project flow.

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