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shahan.a
Participant
Participant
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Registered: ‎06-25-2019

Video Processing Subsystem URAM for Line buffers

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Hi all,

I am working on a project where I will use Video Processing Subsystem(v2.2) in full-fledged mode. The BRAM utilization of the whole design is high and I would like to reduce this. The documentation for Video Processing Subsystem(pg231) mentions an option to choose URAM instead of BRAM for storing line buffers. But I couldn't find any option for this in the GUI. What would be the reason for this? How can I overcome this?

I am using Avnet UltraZed-7EV SOM (xczu7ev-fbvb900-1-i). There are 96 URAMs available in this device and only 19 such URAMs are being currently utilized.

Thanks and Regards

Shahan K A

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florentw
Moderator
Moderator
194 Views
Registered: ‎11-09-2015

HI @shahan.a 

This question was asked some time ago. Please do a quick google search before asking. This was the answer I gave, nothing changed:

https://forums.xilinx.com/t5/Video-and-Audio/Is-VPSS-support-UltraRAM-in-vivado-2020-2/td-p/1214652 

I believe this option was removed due to the fact that the HLS tool (which is compiling the VPSS under the hood) was producing incorrect RTL when using the URAM.

You can still enable the option via the IP properties:

florentw_0-1623671862703.png

 

However, you might be aware that there might be issues in the generated using this setting. So in case you are facing issue, make sure you revert the option to check if this is linked or not.

Usually, when an option is not accessible through the GUI it means that Xilinx does not provide any support for it. So this is provided AS IS.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

1 Reply
florentw
Moderator
Moderator
195 Views
Registered: ‎11-09-2015

HI @shahan.a 

This question was asked some time ago. Please do a quick google search before asking. This was the answer I gave, nothing changed:

https://forums.xilinx.com/t5/Video-and-Audio/Is-VPSS-support-UltraRAM-in-vivado-2020-2/td-p/1214652 

I believe this option was removed due to the fact that the HLS tool (which is compiling the VPSS under the hood) was producing incorrect RTL when using the URAM.

You can still enable the option via the IP properties:

florentw_0-1623671862703.png

 

However, you might be aware that there might be issues in the generated using this setting. So in case you are facing issue, make sure you revert the option to check if this is linked or not.

Usually, when an option is not accessible through the GUI it means that Xilinx does not provide any support for it. So this is provided AS IS.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post