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Smichu
Observer
Observer
449 Views
Registered: ‎02-19-2021

Vivado gives error in 'Open IP example design' step in pg235.

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Hello,

I am having difficulty creating an HDMI Pass-through example design targeted to a zcu104, using Vivado 2020.2.

I am exactly following the steps laid out in pg235 (v3.1), starting with "Running the example design" near bottom of page 78. I follow steps up through and including step 3 on page 79, setting the board to 'zcu104' in step 3. 

First anomaly: When the Vivado Project opens, the Project Summary shows a Virtex-7 part (xc7vx485tffg1157-1), where I expect to see the Zynq part that is on the zcu104 (xczu7ev-ffvc1156-2-e)

Second anomaly: Continuing on to step 8, when I choose an empty Example project directory and click OK, I get the error shown below...

I tried various target boards (zcu104, zcu106), and tried manually changing the part from Virtex-7 to the proper part, but no help.

I searched many forum posts about pg235 but didn't see this particular problem. I suspect I am missing something obvious but after multiple attempts, I can't figure it out. 

Any assistance or advice regarding this problem would be greatly appreciated.

Thank You. 

 

[xilinx.com:ip:v_hdmi_tx_ss:3.1-1] v_hdmi_tx_ss_0: ================================ \
Current Example Design Only Support the Following Boards \
================================ \
1. KC705 \
2. KCU105 \
3. ZC706 \
5. ZCU104 \
9. VMK180 \
Unsupported Board Selected \


[IP_Flow 19-167] Failed to deliver one or more file(s).

[IP_Flow 19-3505] IP Generation error: Failed to generate IP 'v_hdmi_tx_ss_0'. Failed to generate 'Examples Script Extension' outputs:

[Common 17-69] Command failed: Failed to generate IP 'v_hdmi_tx_ss_0'. Failed to generate 'Examples Script Extension' outputs:

[IP_Flow 19-1747] Failed to deliver file 'c:/Xilinx3/Vivado/2020.2/data/ip/xilinx/v_hdmi_tx_ss_v3_1/exdes/bd_flow/exdes_pre_bdgen.ttcl':

[IP_Flow 19-1747] Failed to deliver file 'c:/Xilinx3/Vivado/2020.2/data/ip/xilinx/v_hdmi_tx_ss_v3_1/exdes/bd_flow/exdes_bdgen.ttcl':

[IP_Flow 19-1747] Failed to deliver file 'c:/Xilinx3/Vivado/2020.2/data/ip/xilinx/v_hdmi_tx_ss_v3_1/exdes/bd_flow/exdes_post_bdgen.ttcl':

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1 Solution

Accepted Solutions
watari
Professor
Professor
208 Views
Registered: ‎06-16-2013

Hi @Smichu 

 

>3. Verified short path name. [I had previously shortened the project path to C:/a/a/a.xpr prior to posting to the forum]

 

Would you try my previous post, if you can do it in your environment ?

It's easy way to unlock maximum path length limitation.

 

>4. Regarding the board file: Per your post, yes it appears correct now - not sure what happened. Where is this board file is located, and where can I get a fresh copy if it is corrupted?

 

It's a little different in your environment. But it's helpful for you.

Would you refer the following AR ?

 

https://www.xilinx.com/support/answers/72033.html

 

Hope this helps.

 

Best regards,

View solution in original post

9 Replies
watari
Professor
Professor
372 Views
Registered: ‎06-16-2013

Hi @Smichu 

 

It seems license issue.

Do you have an evaluate license or purchased license for HDMI ?

If yes, would you make sure whether license file is proper or not.

 

Best regards,

Smichu
Observer
Observer
336 Views
Registered: ‎02-19-2021

Hello Watari,

I do have eval license for HDMI - should be good till Nov 2021.  License info is below - does this look right?

v_hdmiIP:Hardware_Evaluation18-nov-20212022.07NodelockedC:\Users\xxx\AppData\Roaming\XilinxLicense\Xilinx.licUncountedNot Applicable106530b9d02dYesOkay1License_Type:Hardware_Evaluation;xxx@xxx.com,v_hdmi,ip,evaluation,_212141116_0_0_248

Thank you for looking into this.

Regards,

Smichu

 

 

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watari
Professor
Professor
318 Views
Registered: ‎06-16-2013

Hi @Smichu 

 

License is OK.

BTW, what kind of Vivado license do you have ?

 

Also, would you share screen shot and whole or relevant log message, when you are facing this issue ?

 

Best regards,

Smichu
Observer
Observer
281 Views
Registered: ‎02-19-2021

Hi Watari,

We have Vivado 2020.2, System Edition.

I looked again at licenses - could this problem be caused by a conflict between my eval license and the two exisitng permanent v_hdmi licenses? [ frankly I wasn't aware we already had licenses]. If so, how can I get rid of the eval license and just try the old license? If this is not the problem please see 3 attached screenshots. The full text of the error log can be found in my original post above from Sept 3. 

Thank you again for looking into this.

Regards,

smichu

v_hdmiIP:Design_LinkingPermanent2020.11NodelockedC:\Xilinx3\Vivado\2020.2\data\ip\core_licenses\Xilinx.licUncountedNot ApplicableANYYesOkay28License_Type:Design_Linking;ipman,v_hdmi,ip,permanent,_0_0_0
v_hdmiIP:Hardware_Evaluation18-nov-20212022.07NodelockedC:\Users\xxx\AppData\Roaming\XilinxLicense\Xilinx.licUncountedNot Applicable106530b9d02dYesOkay73License_Type:Hardware_Evaluation;xxx@xxx.com,v_hdmi,ip,evaluation,_212141116_0_0_248
v_hdmi1IP:Design_LinkingPermanent2020.11NodelockedC:\Xilinx3\Vivado\2020.2\data\ip\core_licenses\Xilinx.licUncountedNot ApplicableANYYesOkay29License_Type:Design_Linking;ipman,v_hdmi1,ip,permanent,_0_0_0

 

If license is not the problem, screenshots are attched:

 

xilpic1.bmp
xilpic2.bmp
xilpix3.bmp
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watari
Professor
Professor
265 Views
Registered: ‎06-16-2013

Hi @Smichu 

 

Since I didn't have any environment of Vivado on Windows, I tried open example design for passtrhough by Vivado 2020.2 on Linux in my side.

 

My environment :

OS : CentOS 7.9

Tool : Vivado 2020.2 System Edition

 

However, I succeeded to build FPGA binary with purchased HDMI license.

Therefore, the flow you mentioned before is fine.

 

So, I suspect the followings.

Would you refer and try them ?

 

1. Broken board file.

 

>First anomaly: When the Vivado Project opens, the Project Summary shows a Virtex-7 part (xc7vx485tffg1157-1), where I expect to see the Zynq part that is on the zcu104 (xczu7ev-ffvc1156-2-e)

 

According to first post, it seems broken board files. If my hypothesis was correct, would you reinstall board files ?

 

However, according to latest post, you succeeded to choose  proper board...

 

2. Different OS between Windows and Linux.

 

There is well know issue in Windows (Microsoft) rather than Vivado (Xilinx).

As you might know, if application use Windows API under default setting, you might be facing maximum path length limitation issue. MAX_PATH is defined as 260 characters.

If you are facing this issue, would you refer the following URL to resolve this issue ?

 

https://docs.microsoft.com/en-us/windows/win32/fileio/maximum-file-path-limitation

 

However, maximum path length in the pass through design is not over 260 characters in my side.

 

3. Mixed license.

Since I haven't seen your whole license log and vivado log, it might wrong.

But if you suspect mixed license issue, would you try the following ?

 

a) Temporary remove "C:\Users\xxx\AppData\Roaming\XilinxLicense\Xilinx.lic" file

b) Remove C:\Users\xxx\AppData\Roaming\XilinxLicense\Xilinx.lic on environment variables LM_LICENSE_FILE or something like this.

 

Hope this helps.

 

Best regards,

Smichu
Observer
Observer
232 Views
Registered: ‎02-19-2021

Hello Watari,

I made these changes you suggested...but no luck...

1. Deleted "C:\Users\xxx\AppData\Roaming\XilinxLicense\Xilinx.lic" file

2. Searched my environment variables, but saw no reference to Xilinx.lic in either the user or system environment variables.  

3. Verified short path name. [I had previously shortened the project path to C:/a/a/a.xpr prior to posting to the forum]

4. Regarding the board file: Per your post, yes it appears correct now - not sure what happened. Where is this board file is located, and where can I get a fresh copy if it is corrupted?

 

I'm wondering if I should try to generate a different Example Design (with different IP), and see if I have similar problem?  

Thank you for your assistance - this is a tough one.

Regards,

smichu

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watari
Professor
Professor
209 Views
Registered: ‎06-16-2013

Hi @Smichu 

 

>3. Verified short path name. [I had previously shortened the project path to C:/a/a/a.xpr prior to posting to the forum]

 

Would you try my previous post, if you can do it in your environment ?

It's easy way to unlock maximum path length limitation.

 

>4. Regarding the board file: Per your post, yes it appears correct now - not sure what happened. Where is this board file is located, and where can I get a fresh copy if it is corrupted?

 

It's a little different in your environment. But it's helpful for you.

Would you refer the following AR ?

 

https://www.xilinx.com/support/answers/72033.html

 

Hope this helps.

 

Best regards,

View solution in original post

Smichu
Observer
Observer
139 Views
Registered: ‎02-19-2021

Hi Watari,
Your solution regarding the Microsoft "long paths" problem seemed to do the trick - thank you and kudos!

https://docs.microsoft.com/en-us/windows/win32/fileio/maximum-file-path-limitation

-Smichu

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watari
Professor
Professor
109 Views
Registered: ‎06-16-2013

Hi @Smichu 

 

Would you refer the following AR ?

I'm not sure. But I guess it's helpful for you.

 

https://www.xilinx.com/support/answers/69143.html

 

Best regards,

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