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santhapurharsha
Visitor
Visitor
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Registered: ‎07-28-2011

What is scaling schedule in FFT 7.1?

What is scaling schedule in FFT 7.1 , System Generator?

 

on what criteria , we should decide the input number of bits?

 

Can anybody explain me this?

 

Thanks

Sriharsha .s 

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bwiec
Xilinx Employee
Xilinx Employee
4,169 Views
Registered: ‎08-02-2011

See pages 3-4 and the section titled 'Forward/Inverse and Scaling Schedule' of DS260 (March 1, 2011 version)

 

From DS260:

 

"A full explanation of scaling strategies and their implications is beyond the
scope of this document; for more information about this topic; see [Ref 1] and [Ref 2]."

 

...

 

"1. W. R. Knight and R. Kaiser, A Simple Fixed-Point Error Bound for the Fast Fourier Transform, IEEE Trans. Acoustics,
Speech and Signal Proc., Vol. 27, No. 6, pp. 615-620, December 1979.
2. L. R. Rabiner and B. Gold, Theory and Application of Digital Signal Processing, Prentice-Hall Inc., Englewood
Cliffs, New Jersey, 1975."

 

A search on the forums will also be helpful. For example:

http://forums.xilinx.com/t5/Digital-Signal-Processing-IP-and/Setting-Scale-SCH-in-Xilinx-FFT-module/m-p/97642/message-uid/97642#U97642

www.xilinx.com
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