Hi, I have tried to design a frequency continuous signal in system generator. In my hardware I have 12bits unsigned DAC chip. and I am now dump the data from matlab .m file to the ROM block in SysGen and then drive to that 12bits unsigned DAC. The code for generating the signal is below:
Fs=10*B;Ts=1/Fs; %sampling frequency and sample spacing
The result for simulationg is working fine which I can see the signal in the scope of matlab and at the waveform block in Sysgen. However the hardware value looks so odd. We can see some signals but like the noisy shifting. If I taps the MSB at the data from ROM and point to one pin. I can see the several square wave at pin_out of hardware but the signal looks like shifting very fast. If I paused as singal sequence of this square wave, it shows as continues signal of square wave.
Moreover, If I used to generate the sinewave from the matlab and dump to the ROM in Sysgen. The simulation and hardware implementation work fine. The sinewave . m file below:
To configure the ROM block, the depth =2048 and initial value vector = S_sin or St as above code. In output, I used unsigned number of bits =12 and binary =11. Ofcause, I need 11 bits counter to increment 2047 ROM address.
So my question here is what wrong with that code for St (first code above)? How can I generate that signal in ROM and in hardware? Is there any way to rewrite that code and test?