12-06-2019 01:25 PM
I'm using a ZCU104 Dev Kit. I built and tested the HDMI Rx/Tx Example for both the FPGA and CPU, and everything worked as expected.
I modified the HDMI Rx/Tx Example to include a Video Mixer IP Block placed in-between the v_tpg_ss_0 Block and the tx_video_axis_reg_slice Block. The Video Mixer is set up for a streamed master layer and one additional memory-mapped layer, and an AXI Interconnect Block connects m_axi_mm_video1 to the Ultrascale+ Processor Block. Everything synthesizes and implements without issue.
I've modified xhdmi_example.h and xhdmi_example.c to include initialization and configuration of the Video Mixer (code is attached, as well as another file I have created that is involved with a different but independent issue from this one). When no input is present, the display presents at 1080p and has the memory-mapped layer overlayed onto the display as expected. However, when an input is connected, the program tries to output at either UHD or 4K to a display that cannot handle those resolutions. I'm not sure where in the code I can either force the streamed layer to display at 1080p or have it set up where it always defaults to 1080p, or if there's something in the VHDL code I'm missing.
12-20-2019 07:16 AM
The video mixer should output the resolution of your master layer. I do not see in your code that you are setting the resolution for the layer 0 (master layer). Is it something that you forgot.
You might want to see the example design for the video mixer and check how it is programmed. The following video series might help: