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Registered: ‎11-15-2018

ZCU104 Vitis Smart Camera Demo not working


I am trying to get the "Smart Camera" demo working. I have the same configuration as in 

I can ping from both sides (Windows laptop and from the board). When I try to run the ./ I get the following output:

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Registered: ‎11-21-2018

Hi @marcos.martinez 

I am just adding some more details here in case there is anyone from the community facing the same issue. 

The messages you were seeing when you tried to execute the demo were as follows: 

Unable to get format: Inappropriate iotcl for device (25).
stream ready at rtsp://<IP>:8554/test.

You don't see anything on the DVI. When you tried to connect to the stream through VLC the demo halts with the message:

Load Xclbin Failed
[DNNDK:XRT] Bitstream download failed


As I explained to you privately, there is a known MIPI IP issue in the Smart Camera Demo as described in AR#73100.

There is also alternative examples available in the Petalinux VCU for a ZCU104/106. If your camera shows up as a /dev/video node that supports YUV422, you could use those demos directly. There is an example in PG252 example-5 page 184 that might be useful also. 

Product Application Engineer - Xilinx Technical Support EMEA

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Registered: ‎07-21-2010

I know this thread is old but I've encountered this problem and this answer left some questions:

1. First, why doesn't Xilinx just fix the **bleep** demo!? It's been almost 10 years since I've worked with Xilinx and enough has changed that I'm basically a newbie. The demo is a great idea but when it immediately fails, then one stumbles on this post, and then realizes they have to figure out exactly what it means to patch a broken demo, it's a little much for someone just trying to figure out if this platform is a viable solution.

2. The above rant leads to the question of exactly how is the AR73100 patch fully integrated into the smart camera demo? I've installed the patch into Vivado 'patches' directory and rebuilt the hardware (the .xsa) but now what? Do I also need to rebuild the "platform" (though admittedly I'm not 100% sure what "platform" encompasses) and/or rebuild "petalinux" (also not entirely sure what "petalinux" encompasses)? Is there a document that explains the build process and which file contains which parts of the demo (i.e. which parts of a typical MPSoC system). For example, back in my original work with Xilinx SoC-style solutions, we downloaded/programmed a .bit file. That seems to be a thing of the past but the present solution only dances around exactly how the FPGA is programmed. Links to any documents about this would be appreciated.

3. The link to PG252 example 5 appears now to be on page 210.



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