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daveA
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Registered: ‎09-22-2020

Zynq UltraScale+ MPSoC VCU TRD 2019.1 (ZCU106)

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Hi,

I have just downloaded the TRD (rdf0428-zcu106-vcu-trd-2019-1_v2) and the dtsi files appear to be missing. Can someone please point me in the right direction?

Thanks,

Dave

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daveA
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Registered: ‎09-22-2020

You are correct Florent - they are generated in that location after created the project from the bsp.

Many thanks,

Dave

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florentw
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Registered: ‎11-09-2015

HI @daveA 

Are they not under project-spec/meta-user/recipes-bsp/device-tree/files/ when you create a new petalinux project using the BSP provided in the VCU package as source?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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florentw
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Registered: ‎11-09-2015

Hi @daveA 

Is everything clear for you on this topic? If yes, could you kindly mark the correct reply as accepted solution to close the thread?

Thanks and Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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daveA
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Registered: ‎09-22-2020

You are correct Florent - they are generated in that location after created the project from the bsp.

Many thanks,

Dave

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