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Contributor
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Registered: ‎09-17-2018

mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Hi,

I have a design reading csi camera input into PS DDR and the frames are displayed using DisplayPort. But the design only works when I power and program the FPGA first and then boot/start the camera. If I reverse the order, the frames seem not synchronized and there is no any interrupts from CSI. I have used an osiloscope to verify there is actually CSI signals going into the FPGA.

Anyone has an idea on this? 

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Xilinx Employee
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Registered: ‎03-30-2016

Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Hello @xinyiz 

This is expected result.

Our MIPI CSI-2 RX Subsystem IP needs LP-11 (stop-state) input for certain period to complete its initialization process. If you run the sensor first, it will start sending video data.

If MIPI CSI-2 RX receives non LP-11 state input (input signal is toggling, Hi-Z etc)during initialization period. Initialization may not succesfuly complete.  

Thanks & regards
Leo

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Xilinx Employee
Xilinx Employee
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Registered: ‎03-30-2016

Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Hello @xinyiz 

This is expected result.

Our MIPI CSI-2 RX Subsystem IP needs LP-11 (stop-state) input for certain period to complete its initialization process. If you run the sensor first, it will start sending video data.

If MIPI CSI-2 RX receives non LP-11 state input (input signal is toggling, Hi-Z etc)during initialization period. Initialization may not succesfuly complete.  

Thanks & regards
Leo

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Contributor
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Registered: ‎09-17-2018

Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Does the initialization process starts after I call XCsiSs_CfgInitialize()?

You say this is expected result, but I also tried the mipi csi-2 rx subsystem example design with the Li Camera. When I program and start the sensor first and sleep for 10 seconds and then call XCsiSs_CfgInitialize() to initialize the csi subsystem, I can still receive frames, why?

 

Is there any way to allow me to run the sensor first without affecting the behavior of CSI receiver? 

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Xilinx Employee
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Registered: ‎03-30-2016

Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Hello @xinyiz 

>Does the initialization process starts after I call XCsiSs_CfgInitialize()?

Yes. Your understanding is correct.
-- a brief explanation is written in here : https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/mipicsiss/src/xcsiss.h

>When I program and start the sensor first and sleep for 10 seconds and then call XCsiSs_CfgInitialize() to initialize the csi subsystem, I can still receive frames, why?

Because your sensors outputs LP-11 on sleep mode.
You can double check this using oscilloscope.

>Is there any way to allow me to run the sensor first without affecting the behavior of CSI receiver? 

MIPI CSI-2 RX Subsystem needs LP-11 input during initialization.
(LP-11 needs to be hold at LP-11 for 100ms or longer, at default setting. See Table 26 of PG202 
)
INIT_VAL.png

If you can initialize MIPI CSI-2 RX after you put sensor to sleep mode, this will work.

 

Thanks & regards
Leo

 

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Registered: ‎11-09-2015

Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Hi @xinyiz ,

Do you have any updates on this topic? Was @karnanl 's replies enough for you?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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@karnanl 

How do you know the Li camera was in sleep mode? I didn't send any command to the sensor after starting it. If it was in sleep mode, in what way was it waken up?

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Xilinx Employee
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Registered: ‎03-30-2016

Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Hello @xinyiz 

I do not know. You mentioned on your previous post that you put your sensor in sleep mode. (?!)

>When I program and start the sensor first and sleep for 10 seconds and then call XCsiSs_CfgInitialize() to initialize the csi subsystem, I can still receive frames, why?
>\Because your sensors outputs LP-11 on sleep mode.You can double check this using oscilloscope.

 

Thanks,
Leo

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Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Hi @xinyiz ,

Do you have any updates on this? Were @karnanl 's replies enough for you?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Registered: ‎03-25-2019

Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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@karnanl 

 

I run xilinx csiss_intr_example. I got a serie of interrupts like this:

 

+=> Frame Receieved Event detected.

+===> Other Errors detected.

Stop Error

+=> Frame Receieved Event detected.

+===> Other Errors detected.

Stop Error

+=> Frame Receieved Event detected.

+===> Other Errors detected.

Stop Error

+=> Frame Receieved Event detected.

+===> Other Errors detected.

Stop Error

...

...

 

Is it correct behavior?

 

Thanks.

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Xilinx Employee
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Registered: ‎03-30-2016

Re: mipi csi-2 rx subsystem: only receive frames when fpga is powered and programmed first

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Hello @tuan.nhanh 

This a new question, and it is not related with this thread topic.
Could you please post a new question at https://forums.xilinx.com/t5/Video/bd-p/DSPTOOL ??

Please provide your
  - MIPI CSI-2 RX XCI file
  - MIPI CSI-2 register dump
  - video_aclk frequency

Perhaps I can double check later today.

Regards
Leo

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