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Contributor
Contributor
580 Views
Registered: ‎12-02-2016

one TPG drive multiple video stream outputs not synchronized

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Hi,

    On my custom Kintex 7 board,  I use one TPG to generate one 1080p@60 video streams,  and then feed it to two AXI4-Stream to Video Out, which are connected to 2 ADV7511 chip. The video out is ok, but the two TVs are not frame-synchronized (one TV  lost 1 frame sometimes), even switch these TVs's connections this phenomenon still not change.

The block design uses onboard 200MHz  differential clock to feed  into Clock Wizard to get 148.5MHz.  I have read PG235, it recommended to use Si5324 to clean up pixel clock for HDMI Transmitter Subsystem
example. However I'm not use this IP but use ADV7511. 

Does this design must have external oscillator? Any other suggestion is appreciate.

Best Regards

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Moderator
Moderator
503 Views
Registered: ‎11-09-2015

Hi @xxhc417s 

I think you should look at the ADV7511. This might be where the delay is added.

You might want to discuss with Analogue Devices to check if they have any option to synchronize multiples.

I do not think just having the sync/data signals synchronized will be enough.

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Xilinx Employee
Xilinx Employee
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Registered: ‎03-07-2018

Hello @xxhc417s 

I believe you need to use AXI4-Stream Switch after Video Test Pattern Generator (VTPG) to implement your design. You can find more information on AXI4-Stream Switch in PG085.

Your setup will be as follows:

VTPG >> AXI4-Stream Switch >> two processing paths (each one will have indenpendent AXI4-Stream to Video Out) >> Two ADV7511 chip

Regards,
Bhushan

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Contributor
Contributor
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Registered: ‎12-02-2016

hi,

 I am sorry for the incorrect description. The Block Design has only one axis video stream, and one axi4-stream video out. Pins of the two adv7511 chips  are connected to the same net internally, i.e. de_0 connects  to de_1, hsync_0 connects to hysnc_1..., so they should have the same data and clock.

Best Regards

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Xilinx Employee
Xilinx Employee
539 Views
Registered: ‎03-07-2018

Hello @xxhc417s 

Is it possible for you to share block diagram of your setup?

Vivado tool version?

Regards,
Bhushan

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Contributor
Contributor
515 Views
Registered: ‎12-02-2016

Thanks for your reply. 

The monitor have four HDMI inputs.  TPG  was setup to generate moving box. When the input frames are not synchronized, the boundary of boxes are not aligned.

 

block design.png

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Moderator
Moderator
504 Views
Registered: ‎11-09-2015

Hi @xxhc417s 

I think you should look at the ADV7511. This might be where the delay is added.

You might want to discuss with Analogue Devices to check if they have any option to synchronize multiples.

I do not think just having the sync/data signals synchronized will be enough.

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

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Moderator
Moderator
463 Views
Registered: ‎11-21-2018

Hi @xxhc417s 

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

 

If this is not solved/answered, please reply in the topic giving more information on your current status.

 

Thanks and Regards,

Aoife
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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