11-28-2018 10:42 PM - edited 11-29-2018 01:51 AM
I'm facing some difficulty in my design.
I've created an integrated design with HDMI TX & DP TX subsystems (Both are based on the Xilinx example design). I want to give the DP TX subsystem input with either AXI video stream coming from framebuffer-read (stream with 2PPC,8BPC as required for HDMI) or with an input from Xilinx VTPG. To facilitate this type of switching, I've used an AXI Stream switch IP.
AXI Stream switch output 1 will be given to HDMI TX subsystem input and AXI stream switch output 2 will be given to DP TX subsystem input.
As it is evident from the example designs, HDMI TX subsystem works with an input stream having 2 pixel per clock and 8 Bits per component. Whereas, DP TX subsystem needs an input stream having 4PPC and 8BPC (For 4K 60Hz).
Now, to make DP TX subsystem to work at 4K 60Hz , I have to convert the 2PPC video stream ( coming from AXI stream switch output 2) to 4PPC video stream.
Please suggest me a way to do this.
12-06-2018 02:18 AM
11-29-2018 03:36 AM
11-29-2018 09:39 PM
I had tried changing pixel per clock settings in frame buffer read (for HDMI) and HDMI TX subsystem and kept it to 4 PPC. But unfortunately design didn't work.
Not quite sure on other factors to consider while changing the pixel per clock value to 4 from 2.
12-03-2018 12:23 AM
12-03-2018 08:53 PM - edited 12-04-2018 12:10 AM
For HDMI, I did the changes for ppc settings in Vphy, rx/tx subsystems, scaler and the frame buffers. I have a VPSS scaler in my design and the scaler driver provided by Xilinx is supporting 1 and 2 PPC only. Due to this, I was bit hesitant in changing HDMI design to 4PPC.
While with DP, I've tried providing video stream with 2ppc to the dp subsystem but unfortunately it doesn't work for me. Is there any settings particular to be taken care while dynamically switching the ppc?
I know the bits per component (bpc) can be changed but how to facilitate ppc dynamic changing?
12-06-2018 02:18 AM