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Contributor
Contributor
643 Views
Registered: ‎05-25-2015

AXI VDMA Park Pointer and Interrupt Frame Counter Issue

Hello,

I have been trying to operate the AXI VDMA in Park Mode. 

The core operates in Genlock master mode and with FSYNC off.

 

Through SDK, I am sending the following configuration:

 

1. Number of frame stores = 4

2. FixedFrameStore Addr (which I believe is the frame to park on) = 4

3. VSIZE = 2, HSIZE = 512, STRIDE = 4096

4. Interrupt Frame Counter = 12

5. FrameCntEn = 1

 

From what I have understood going through the document, PARK MODE forces the VDMA to park on a frame, 4 in my case, as soon as it completes transactions on Frame 1, 2, 3, and 4. Thus, the number of frames transferred should be 8 and the frame counter should count down from 12 to 4 and then halt since there is no further frame to suffer.

 

However, the results I have obtained are entirely different. I have observed that the operations go on till 12 frames have been transferred and the PARK_REG value returns nothing but the FixedFrameStore Addr value.

 

In addition, the Interrupt on Frame Counter value remains deasserted, i.e. even though the core has been set to generate an interrupt on completion of the frame transfers, the flag remains deasserted, which perhaps is a known issue and has been answered in this Answer Record here.

 

I have been stuck on this issue for a while, and I would be grateful if it is highlighted where my understanding is flawed.

 

Thank You

Gaurav

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Moderator
Moderator
575 Views
Registered: ‎11-09-2015

Re: AXI VDMA Park Pointer and Interrupt Frame Counter Issue

HI @gauravjain14,

 

Could you send your full configuration for the VDMA?

 

Are you in park mode for both read and write?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
466 Views
Registered: ‎11-09-2015

Re: AXI VDMA Park Pointer and Interrupt Frame Counter Issue

Hi @gauravjain14,

 

Do you have any updates on this?

 

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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