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Observer anilsutej
Observer
114 Views
Registered: ‎01-07-2012

AXI VDMA issue with VSIZE

Hello,

My Requrement : I have a  Custom video IP and Frames need to be written in to SDRAM using AXI VDMA and also Read back the same to stream on any video interface.

I started from Example Project which was set to VSIZE = 1; I have chnaged the Register to 10 but my simulations are not moving forward. Following are the sanpshots of the waveforms 

image.png

Only one Line is written and my stream module is issuing the lines but there is nothing is happening on s2mm ports.

 

Following are the Register Configurations

image.png

 

My Stream Input Frequency is 25MHz and s2mm,m2ss clocks are running @ 50 MHz

and VDMA settings are 

image.png

 

Please suggest if there is wrong in register settings and also the waveforms are not following the timing waveforms given in the AXI VDMA document.

And also please point me to a correct documentation which explains the handshake properly especially for the signals TREADY -- TVALID , BREADY --  BVALID and TLAST

 

Thanks

Anil 

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2 Replies
Moderator
Moderator
42 Views
Registered: ‎11-09-2015

Re: AXI VDMA issue with VSIZE

Hi @anilsutej 

You might want to have a look at my Video Series and specifically the following one which are showing example using the VDMA:

Video Series 24: Using the AXI VDMA in Triple Buffer Mode

Video Series 25: Debugging issues on the AXI VDMA IP

Video Series 26: Examples of advanced uses of the AXI VDMA IP

They are all running in HW (not in simulation) but you can still read them as reference

For documentation around TREADY -- TVALID , BREADY -- BVALID and TLAST, you might want to get the AXI4 and AXI4-Stream spec from ARM website (it is free, you just need to register). Also, refer to UG934 for AXI4-Stream specific use for Xilinx Video IPs

Then, starting by looking at your configuration:

  • You write 0x4990 to 0x34 which does not makes sense to me. This is a status register, you usually want to write 0xFFFFFFFF to make sure the status are cleared. And I would not do it during the configuation, but a bit later when the VDMA is started to make sure you are not getting "startup errors"
  • Same comment of the write at 0x04
  • You have configured MMS2 stride to 0 (at 0x58). This will cause an issue. For general use case, use HSTRIDE = HSIZE
  • You are setting 10 frame buffer in you GUI configuration but you are setting the address proplery for only 1. (another one is done for S2MM but not for MM2S). This might also cause issue

You also might want to read back the register value of the status registers (0x04 and 0x34) to see if any errors are flagged. You might want to refer to my video series 25 for some help solving those

This should help you doing some progresses.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Observer anilsutej
Observer
27 Views
Registered: ‎01-07-2012

Re: AXI VDMA issue with VSIZE

Dear Florent,

Thank you the Reply. Appreciate your inputs on this
I will follow the videos and will get back to you.

Thanks
Anil
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