08-17-2015 07:41 AM
I am working through a project to split an AXI4-Stream to 6 different outputs. The pipeline is as follows:
The issue I'm having is depending on the build, the VTC/AXI to Vide out instances are not asserting TReady together; therefore, the AXI Broadcast does not assert TReady and the VDMA does not pass data.
What is the most reliable way to configure the AXI to Video out and Timing Controller to yield 6 duplicate outputs? In slave mode, as detailed below, we have had success, but a rebuild may result in halted video streams.
Topolgies to consider:
Is there another way to achieve this? Some example designs seem to utilize a VDMA for each output. We'd like to avoid this if possible. Is there something that can be done to better constrain the design/initialze the cores to ensure they assert Tready together?
08-19-2015 09:11 AM
08-29-2018 06:29 AM
Am trying something very similar to this. A VDMA followed by broadcaster with two out ports. One of the out port is connected to AXI-S to Video out instance (with a VTC of its own) . The other is connected to a resampler->YCC2RGB->AXI-S to video out instance (with a VTC of its own).
I do see the same problem. I do not get a video output on any of the video out ports.
Were you able to fix this? If so can you please suggest on the changes that you made in the setup that fixed the issue.
Thanks and Regards,
Ajay Kumar G