Turn on suggestions

Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.

Showing results for

- Community Forums
- :
- Forums
- :
- Hardware Development
- :
- Video
- :
- Bit Reversal Question on FFT Core

- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Mute
- Printer Friendly Page

Highlighted
##

Is the FFT Core (7.1) capable of accepting bit-reversed inputs and outputing the data in natural order? Specifically, I have a signal that I want to process using a forward FFT core configured to output the result in bit-reversed order. I then want to take the resulting data into an inverse FFT core, also configured to output the data in bit-reversed order, resulting in its output data being in natural order. I am able to successfully simulate with both cores configured for natural order inputs/outputs, but to save on resoursces/latency, I would like to configure the forward and inverse FFT cores to use bit-reversed outputs.

lrsmith

Visitor

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

04-11-2011 10:57 AM

7,813 Views

Registered:
04-11-2011

Bit Reversal Question on FFT Core

8 Replies

Highlighted
##

Any insight on this question would be much appreciated, even if the answer is no. I'm led to believe the FFT core is not compatible with bit-reversed inputs, but would like confirmation from those more experienced in the matter since I am relatively new to using this core.

lrsmith

Visitor

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

04-14-2011 07:53 AM

7,769 Views

Registered:
04-11-2011

Re: Bit Reversal Question on FFT Core

Highlighted
##

bpelger

Visitor

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

08-31-2011 07:28 AM - edited 08-31-2011 07:29 AM

7,686 Views

Registered:
08-31-2011

Re: Bit Reversal Question on FFT Core

Actually I'm interested in this topic too.

An option for bit-reversed inputs would be especially useful for doing fast convolution using overlap-discard and overlap-add methods. Since this is basically a FFT followed by an IFFT, it would be very resource efficient if both cores could work with bit-reversed outputs and inputs respectively.

Unfortunately this is not possible since the FFT/IFFT cores support only bit reversed outputs, and I don't see an easy way of getting a bit-reversed input IFFT from a bit-reversed output IFFT.

I wonder how am I supposed to implement fast convolution using coregen-FFTs. The only options I can think of is using the BRAM-expensive natural order FFT and IFFT.

Highlighted
##

bwiec

Xilinx Employee

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

08-31-2011 09:42 AM - edited 08-31-2011 09:43 AM

7,682 Views

Registered:
08-02-2011

Re: Bit Reversal Question on FFT Core

bpelger is correct, Bit reverse input is not supported at this time.

Natural order FFT/IFFT will allow implementation of fast convolution algorithms.

www.xilinx.com

Highlighted
##

I just had the impression that fast convolution is such a standard task, that I must be missing an option or something else in coregen. Thanks for the clarification.

bpelger

Visitor

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

08-31-2011 10:50 AM

7,678 Views

Registered:
08-31-2011

Re: Bit Reversal Question on FFT Core

Highlighted
##

ywu

Xilinx Employee

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

08-31-2011 04:07 PM

7,674 Views

Registered:
11-28-2007

Re: Bit Reversal Question on FFT Core

Could you please open a webcase requesting FFT core supporting inputs in bit-reversed order? If yes, please send me the webcase number via PM.

@bpelger wrote:

Cheers,

Jim

Jim

Highlighted
##

Did anyone open up a ticket for this as mentioned in the last response by Jimwu?

I am very interested in FFT core with bit reversal output and input back into IFFT (with the same bit reversal order) and get natural order out.

Thanks

tomnguyen_2

Newbie

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

03-15-2012 11:15 AM

7,568 Views

Registered:
10-11-2010

Re: Bit Reversal Question on FFT Core

I am very interested in FFT core with bit reversal output and input back into IFFT (with the same bit reversal order) and get natural order out.

Thanks

Highlighted
##

bwiec

Xilinx Employee

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

03-15-2012 11:20 AM - edited 03-15-2012 11:20 AM

7,566 Views

Registered:
08-02-2011

Re: Bit Reversal Question on FFT Core

Yes, a case was opened for this. The possibility for bit reversed input is being investigated. No firm plans at this point, though.

I recommend you contact your FAE and provide feedback to them so they can communicate with marketing.

www.xilinx.com

Highlighted
##

soupie62

Newbie

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

06-23-2013 10:43 PM

6,834 Views

Registered:
06-23-2013

Re: Bit Reversal Question on FFT Core

Am I missing something?

A basic 10-bit counter gives an output A9..A0 [A0 is lsb]. Add that to a register and you get a source pointer.

By flipping the order of the output pins PURELY IN CODE [A0..A9], and adding to a second register, you get a target pointer.

Incrementing the counter would automatically sort the destination data into bit-reversed order [or vice versa].

With source data untouched, you can have multiple ovelapping FFTs being solved in parallel. Throw in a DSP48 slice and a lookup table, and you can apply a window to the data as you transfer it, before the FFT starts.