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Visitor pschoeps
Visitor
178 Views
Registered: ‎07-23-2019

CameraLink Full IP Core

Hello,

I'm trying to connect a camera with CameraLink Full interface to ZCU104 using a FMC daughter card.

Using XAPP1315 I started writing an IP core instantiating 3 channels x,y and z with 4 data lines each as shown in the figure below.cameralink.png

Questions:

  1. Continuing from here, how do I synchronize and align the signals coming out of the 3 channels?
  2. Is it possible to transfer the combined video data to VDMA using Video In to AXI4-Stream? The PG403 limits the number of pixel per clock to 4 but in CameraLink Full mode 9 pixels (monochrome, 8bit) are transmitted each clock.

 

Kind regards,
Patrick

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1 Reply
Scholar watari
Scholar
140 Views
Registered: ‎06-16-2013

Re: CameraLink Full IP Core

Hi @pschoeps 

 

1.

Would you use clock signal on CameraLink to synchronize these signals ?

 

2.

You can remap your signals. For example add some zero on LSB.

 

Best regards,

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