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Visitor divya2m
Visitor
216 Views
Registered: ‎05-30-2019

Display port configuration using microblaze

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Hi,

while working on a project having DP Tx subsystem, microblaze, BRAM,clocking wizard, and reset.synthesis , implementation and bitstream were generated. and exported to SDK. corresponding BSP was also generated. the generated 'c' code has certain values like (0x234) as offset address in certain 'c' functions declared. these offset addresses do not match with the offset address of the DP or VPHY registers. could you please throw some light on what these offset values correspond to??. and how should the registers be accessed through this 'c' code.

thanks in advance

divya

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Visitor divya2m
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Registered: ‎05-30-2019

Re: Display port configuration using microblaze

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it helped as a solution

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Scholar watari
Scholar
204 Views
Registered: ‎06-16-2013

Re: Display port configuration using microblaze

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Hi @divya2m 

 

If my understanding is correct, it show offset address of DPCD...

 

Best regards,

Xilinx Employee
Xilinx Employee
172 Views
Registered: ‎03-04-2018

Re: Display port configuration using microblaze

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Hello @divya2m ,

 

As watari mentioned, 0x234 is the DPCD register on the DisplayPort.  If you want to know in details, please get the specification for the VESA DisplayPort Standard.

 

Best regards,

Kshimizu

Product Application Engineer Xilinx Technical Support

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Visitor divya2m
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Registered: ‎05-30-2019

Re: Display port configuration using microblaze

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it helped as a solution

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