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Adventurer
Adventurer
829 Views
Registered: ‎06-13-2012

Displayport tx link debug

Hi all,

 

I'm working on a custom board with Displayport IP, I used the example design to start debugging my hardware. Actually the receiver section seems to work properly, as I connect my videocard, my board is recognized as a new 4K monitor and in the MSA rx attributes I read the correct values of the input video.
Now I'm trying to check the tx section, always using the example provided with the IP as a starting point.
I see that the AUX channel is working properly as I'm able to read the monitor EDID and preferred resolution 3840x2160@60Hz etc...
The Tx section is connected to a video pattern generator (Xilinx IP) with video resolution 3840x2160, as I connect the monitor I see:
SS INFO:Training passed at link rate:0x14 lane count:4
SS INFO: Link bandwidth = 2160000 Kbps and video bandwidth = 1782000 Kbps

SS INFO:SST: Config done!

SS INFO:Link is UP after main link enabled!

SS INFO:Enabled main link!

 

So I think that the training is pass and everything is properly configured but the monitor tell me no signal, I'm missing something?

In the board I'm using SN75DP130 as PHY redriver, I didn't change the default setup as I think is already correct, I've to use a particular setup? As the training pass, I think the redriver has done his job of monitoring AUX channel and change his output levels.

I saw with the debug that the axi stream from the pattern generator and the tx subsystem is running, I check various registers of the IP and all seems ok.

 

Any advise?

 

Regards

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6 Replies
Moderator
Moderator
795 Views
Registered: ‎10-04-2017

Re: Displayport tx link debug

Hi @auricm,

 

Using the example design is a good starting point.

 

 

Have you tried other resolutions?

Can you try the debug suggestions listed in PG199?

 

 

2018-07-24 09_35_58-Xilinx Documentation Navigator 2017.2 - file____C__Users_samk_Documents_XilinxDo.png

2018-07-24 09_37_43-Xilinx Documentation Navigator 2017.2 - file____C__Users_samk_Documents_XilinxDo.png

 

Regards,

Sam

Don't forget to reply, kudo, and accept as solution.

Xilinx Video Design Hub
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Adventurer
Adventurer
774 Views
Registered: ‎06-13-2012

Re: Displayport tx link debug

Hi @samk

 

thanks for the answer, already check the first 4 points and are ok, I don't have a working log, so I can't compare my register dump.

Actually I'm unable to check DPCD as SDK is not working and I'm looking for a solution. I will let you know as soon as possible.

Regars

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Moderator
Moderator
697 Views
Registered: ‎11-09-2015

Re: Displayport tx link debug

Hi @auricm,

 

Do you have any updates on this?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Adventurer
Adventurer
641 Views
Registered: ‎06-13-2012

Re: Displayport tx link debug

Hi @florentw,

 

actually I've no updates on this, I'm unable to check DPCD registers.

I will let you know if I've news

 

regards

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Moderator
Moderator
419 Views
Registered: ‎11-09-2015

Re: Displayport tx link debug

Hi @auricm,

 

I would like to check if you had any updates on this topic? I guess you had as we haven't heard from you for few months :)

 

Is it possible for you to share your solution with the community?

 

Many Thanks,

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Adventurer
Adventurer
412 Views
Registered: ‎06-13-2012

Re: Displayport tx link debug

Hi @florentw,

 

actually seems to be an hardware problem, so I'm waiting for new boards.
Thank you for your support

 

Regards