UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Observer prasanna_18
Observer
292 Views
Registered: ‎11-23-2018

Enable HS and ESC Timeout counters/registers in MIPI CSI-2 Receiver Subsystem v3.0

 In our design we are using MIPI CSI-2 Receiver Subsystem v3.0  logiCore IP.

In that IP has MIPI D-PHY block.When I try customizing that block (we want to enable Enable HS and ESC Timeout counters/registers ) it doesn't reflect  in the block.

Not able to enable that interface.how can we enable that feature in our design?.

Tags (2)
2 Replies
Xilinx Employee
Xilinx Employee
152 Views
Registered: ‎03-07-2018

Re: Enable HS and ESC Timeout counters/registers in MIPI CSI-2 Receiver Subsystem v3.0

Hello @prasanna_18

You are not able to change any option of MIPI DPHY IP inside MIPI CSI-2 IP as it is read only.

MIPI CSI-2.png

 

 

Regards,
Bhushan

-------------------------------------------------------------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
-------------------------------------------------------------------------------------------------------------------------------------------------
Highlighted
Xilinx Employee
Xilinx Employee
113 Views
Registered: ‎03-30-2016

Re: Enable HS and ESC Timeout counters/registers in MIPI CSI-2 Receiver Subsystem v3.0

Hello @prasanna_18

As already mentioned by @bpatil, since you are using older version of MIPI CSI-2 Receiver Subsystem,
MIPI DPHY IP is set as a read-only IP and parameter modification cannot be easily done.
-- Manual RTL modification can be done, but I do not recommend this method.

Instead, we already added a new IP features in Vivado 2018.3.
Could you please download the latest Vivado and try the following step ?
0. Open MIPI CSI-2 Receiver Subsystem wizard GUI.
1. Check "D-PHY Register interface"
2. Check "Enable HS and ESC Timeout Counters/Registers"
3. Set the suitable HS and ESC Timeout value that fit your system

0110_XF_20183_MIPI_RX_CSI2_new_features.png

 


Hope this helps.

Thanks,
Leo