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Participant pnk004
Participant
489 Views
Registered: ‎12-23-2018

FPGA HDMI output does not work with "No signal detected in HDMI monitor".

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I am developing a FPGA with HDMI output. However it does not work with "No signal detected in HDMI monitor".

I am using Vivado 2016.4 and Zynq 7000 XC7z030sbg485-1, AVNET picozed board(AES-Z7PZ-7Z030-SOM-I-G REVC05), and a board similar to picozed_7030_fmc1.

I use the I2C 0 bidirection ports(EMIO) from PS into the ADV7511 device(HDMI output).

The output of FPGA is HDMI 1080p. the HDMI_output clock is 148.5MHz.

I attached the FPGA block diagram of HDMI output.

Question #1) is the block diagram correct?


I have the other question about Address usage in the I2C firmware library (standalone_bsp/iicps_v3_4) in Zynq 7000 XC7z030sbg485-1

The datasheet of ADV7511 has the following text.

* Power Down / I2C Address (PD/AD)
The Power Down / Address (PD/AD) input pin can be connected to GND or AVDD (through a 2KΩ (+/-10%) resistor
or a control signal). The device address and power down polarity are set by the state of the PD/AD pin when the
ADV7511 supplies are applied. For example, if the PD/AD pin is low (when the supplies are turned on) then the device
address will be 0x72 and the power down will be active high. If the PD/AD pin is high (when the supplies are turned
on), the device address will be 0x7A and the power down will be active low. The ADV7511 power state can also be
controlled via I2C registers (the PD pin and PD register bit are “or’ed” together). For further information, please refer
to the Power Management section of the ADV7511 Programming Guide.

The PD pin is pulled-down-low to ground.

Question #2) To use 0x72 address, should I set the FPGA PD pin as 0? or should I set the FPGA PD pin as 1 value?

Question #3) In the firmware, if I set the write register as 0x72, it causes error that "Error: No monitor detected on HDMI input!" since register 0x42 value is not hpd_ctrl_mask = 0x40; // bit 6 = state of HPD.
If I set the value as 0x39, it causes no error that the register 0x42 value is equal to hpd_ctrl_mask = 0x40; // bit 6 = state of HPD.
I read an article that "By default AXI IIC uses 7-bit address mode so the address 0x39 (from UG) is in fact 0x72 from ADV7511 product page (0x39 << 1 = 0x72)."

Should I use address 0x39 rather than 0x72 address?


* Question #4) { register, set value } for the ADV7511 settting through I2C is as follows. Is it correct and sufficient?

{0x41, 0x10}, // Power Down Control // R0x41[ 6] = PowerDown = 0 (power-up)
{0xD6, 0xC0}, // HPD Control // R0xD6[7:6] = HPD Control = 11 (always high)
{0x15, 0x01}, // Input YCbCr 4:2:2 with separate syncs
{0x16, 0xB9}, // Output format 4:2:2, Input Color Depth = 8
// R0x16[ 7] = Output Video Format = 1 (4:2:2)
// R0x16[5:4] = Input Video Color Depth = 11 (8 bits/color)
// R0x16[3:2] = Input Video Style = 10 (style 1)
// R0x16[ 1] = DDR Input Edge = 0 (falling edge)
// R0x16[ 0] = Output Color Space = 1 (YCbCr)
{0x17, 0x02}, // Aspect ratio of input video R0x17[1] = 0x10(16x9) (4x3 = 0b0, 16x9 = 0b1). ischoi.
{0x48, 0x10}, // Video Input Justification. R0x48[4:3] = ‘10’ (left justified). I am using data[35:20] input.
{0x55, 0x20}, // Set RGB in AVinfo Frame
// R0x55[6:5] = Output Format = 01 (YCbCr)
{0x56, 0x28}, // Aspect Ratio
// R0x56[5:4] = Picture Aspect Ratio = 10 (16:9)
// R0x56[3:0] = Active Format Aspect Ratio = 1000 (Same as Aspect Ratio)
{0x98, 0x03}, // ADI Recommended Write
{0x9A, 0xE0}, // ADI Recommended Write
{0x9C, 0x30}, // PLL Filter R1 Value
{0x9D, 0x61}, // Set clock divide
{0xA2, 0xA4}, // ADI Recommended Write
{0xA3, 0xA4}, // ADI Recommended Write
{0xAF, 0x06}, // HDMI/DVI Modes
// R0xAF[ 7] = HDCP Enable = 0 (HDCP disabled)
// R0xAF[ 4] = Frame Encryption = 0 (Current frame NOT HDCP encrypted)
// R0xAF[3:2] = 01 (fixed)
// R0xAF[ 1] = HDMI/DVI Mode Select = 2 (HDMI Mode)
{0xE0, 0xD0}, // Must be set to 0xD0 for proper operation
{0xF9, 0x00} // Fixed I2C Address (This should be set to a non-conflicting I2C address)

I will really appreciate if I can be given answer and advice.

Thank you very much.

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1 Solution

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Moderator
Moderator
452 Views
Registered: ‎11-09-2015

Re: FPGA HDMI output does not work with "No signal detected in HDMI monitor".

Jump to solution

Hi @pnk004 ,

The first thing you might want to look at is my Video Series 19: Using the On-Board HDMI on ZC702 (Vivado design), Video Series 20: Starting with SDK and configuring the ADV7511 and Video Series 21: TPG Application on ZC702. This is on ZC702 but I tried to do it detailled enough that  you can report this for other boards using the ADV7511.

Then lets try to go through your questions:

Question #1) is the block diagram correct?

[Florent] - Looking quickly at it, it seems pretty correct. The only thing is that we do not se the video clock coming to the ADV7511. I assume you have connected it in your wrapper? Else this might be what you are missing

Question #2) To use 0x72 address, should I set the FPGA PD pin as 0? or should I set the FPGA PD pin as 1 value?

[Florent] - From what I understand from the UG for the ADV7511 is that you need to have PD=0 if you want to use address 0x72. This is what is used on the ZC702 board but going through an IIC switch

Question #3) In the firmware, if I set the write register as 0x72, it causes error that "Error: No monitor detected on HDMI input!" since register 0x42 value is not hpd_ctrl_mask = 0x40; // bit 6 = state of HPD.
If I set the value as 0x39, it causes no error that the register 0x42 value is equal to hpd_ctrl_mask = 0x40; // bit 6 = state of HPD.
I read an article that "By default AXI IIC uses 7-bit address mode so the address 0x39 (from UG) is in fact 0x72 from ADV7511 product page (0x39 << 1 = 0x72)."

Should I use address 0x39 rather than 0x72 address?

[Florent] -The address on the ZC702 is 0x39 because this is through a switch. I am not sure if this is what you saw. If the ADV7511 is connected directly to the iic of the zynq, then you should use the address 0x72.

Question #4) { register, set value } for the ADV7511 settting through I2C is as follows. Is it correct and sufficient?

[Florent] - Refer to the code is my video series, you will see what is required


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
2 Replies
Moderator
Moderator
453 Views
Registered: ‎11-09-2015

Re: FPGA HDMI output does not work with "No signal detected in HDMI monitor".

Jump to solution

Hi @pnk004 ,

The first thing you might want to look at is my Video Series 19: Using the On-Board HDMI on ZC702 (Vivado design), Video Series 20: Starting with SDK and configuring the ADV7511 and Video Series 21: TPG Application on ZC702. This is on ZC702 but I tried to do it detailled enough that  you can report this for other boards using the ADV7511.

Then lets try to go through your questions:

Question #1) is the block diagram correct?

[Florent] - Looking quickly at it, it seems pretty correct. The only thing is that we do not se the video clock coming to the ADV7511. I assume you have connected it in your wrapper? Else this might be what you are missing

Question #2) To use 0x72 address, should I set the FPGA PD pin as 0? or should I set the FPGA PD pin as 1 value?

[Florent] - From what I understand from the UG for the ADV7511 is that you need to have PD=0 if you want to use address 0x72. This is what is used on the ZC702 board but going through an IIC switch

Question #3) In the firmware, if I set the write register as 0x72, it causes error that "Error: No monitor detected on HDMI input!" since register 0x42 value is not hpd_ctrl_mask = 0x40; // bit 6 = state of HPD.
If I set the value as 0x39, it causes no error that the register 0x42 value is equal to hpd_ctrl_mask = 0x40; // bit 6 = state of HPD.
I read an article that "By default AXI IIC uses 7-bit address mode so the address 0x39 (from UG) is in fact 0x72 from ADV7511 product page (0x39 << 1 = 0x72)."

Should I use address 0x39 rather than 0x72 address?

[Florent] -The address on the ZC702 is 0x39 because this is through a switch. I am not sure if this is what you saw. If the ADV7511 is connected directly to the iic of the zynq, then you should use the address 0x72.

Question #4) { register, set value } for the ADV7511 settting through I2C is as follows. Is it correct and sufficient?

[Florent] - Refer to the code is my video series, you will see what is required


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Participant pnk004
Participant
424 Views
Registered: ‎12-23-2018

Re: FPGA HDMI output does not work with "No signal detected in HDMI monitor".

Jump to solution

Dear Florent.

Thank you very much for your kind answer.

I connected the video clock in wrapper, in top-level entity, which is an output of clocking_wizard.

Though I do not use ZC702 board and IIC switch (the ADV7511 is connected directly to the iic of the zynq), adress 0x39 works (0x72 does not work).

I have solved the problem. The HDMI interface works well.

Thank you very much.

 

 

 

 

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