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Contributor
Contributor
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Registered: ‎05-27-2008

HDMI 1.4/2.0 Dual/Quad pixel data format for AXI-Streaming

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Tables 3-6 and 3-7 in PG236 show the data format for 420 YUV 8-bit video in AXI Streaming Dual and Quad pixels-per clock scenarios.  A customer claims that the Quad pixel per clock figure (3.6) is actually showing 8 pixels instead of 4, and the Dual pixel per clock figure (3-7) is actually showing 4 pixels instead of 2.

The following two figures, 3-8 and 3-9 show yuv420 data in both native and AXI Streaming formats (Dual pixel mode).  Both of these figures correctly show that there are there are only two pixels per clock , not 4 as in figure 3.7.

Can you please confirm that figures 3.6 and 3.7 are incorrect?  Attached are screenshots of the figures in question.

 

jd
pg236_fig3-6_fig3-7.PNG
pg236_fig3-8.PNG
pg236_fig3-9.PNG
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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

Re: HDMI 1.4/2.0 Dual/Quad pixel data format for AXI-Streaming

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@jdehaven 

In order to make line 0 in AXI4 Stream contains 2 Y samples per clock, and line 1 only contains Y samples, the native interface should be :

  • 2PPC case, YUV420 has 4 Y components in every clock. When it is remapped to AXI4-Stream, then each clocks got 2 Y components.
  • 4PPC case, YUV420 has 8 Y components in every clock. When it is remapped to AXI4-Stream, then each clocks got 4 Y components.

The image belows shows how 2ppc data looks in native interface, and AXI4 Stream interface. 4ppc should be similar.data_mapping.JPGAlso HDMI cable natively contains two pixels per clock in TMDS data. When it maps to our IP 2ppc native interface, two TMDS clock cycles of pixels (eg. Pixel 00/01/02/03) are mapped to native interface.

tmds.JPG

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Moderator
Moderator
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Registered: ‎10-04-2017

Re: HDMI 1.4/2.0 Dual/Quad pixel data format for AXI-Streaming

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We are looking at this internally and will close this thread once we have confirmation.
Don't forget to reply, kudo, and accept as solution.

Xilinx Video Design Hub
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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

Re: HDMI 1.4/2.0 Dual/Quad pixel data format for AXI-Streaming

Jump to solution

@jdehaven 

In order to make line 0 in AXI4 Stream contains 2 Y samples per clock, and line 1 only contains Y samples, the native interface should be :

  • 2PPC case, YUV420 has 4 Y components in every clock. When it is remapped to AXI4-Stream, then each clocks got 2 Y components.
  • 4PPC case, YUV420 has 8 Y components in every clock. When it is remapped to AXI4-Stream, then each clocks got 4 Y components.

The image belows shows how 2ppc data looks in native interface, and AXI4 Stream interface. 4ppc should be similar.data_mapping.JPGAlso HDMI cable natively contains two pixels per clock in TMDS data. When it maps to our IP 2ppc native interface, two TMDS clock cycles of pixels (eg. Pixel 00/01/02/03) are mapped to native interface.

tmds.JPG