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Registered: ‎04-01-2008

HDMI 2.0, Video Phy, and KU GTH pinout question..

I am going to be using the HDMI 2.0 core in a new design and I have a few questions about it.  In reading the datasheets for the Video PHY IP, for the KU GTH interfaces, you can select which GTH it uses (bank 224/225/226/227), but what bit is what output?  For example, If using Bank 227, HDMI TX Data bit 0, is that GTH 0 (X0Y12)?  And then HDMI TX Data 1, is that GTH 1 (X0Y13), etc? 


Second question, is there any limitation on using multiple pairings of the HDMI 2.0 Core and Video PHY?   Meaning, I want to have two HDMI Transmit interfaces in one FPGA, one on Bank 226 and one on Bank 227.  Is this possible without any issues?  I understand that each HDMI TX Interface would need a unique HDMI 2.0 TX Core, and Video PHY on separate GTH Banks. 


Thanks for the time.


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