02-06-2020 03:25 PM
I'm trying to implement an HDMI-to-GTX converter using a ZC706 board with an Inrevium FMC for the HDMI interface. A second copy of this is to receive the GTX and convert back to an HDMI source. Video at 4k 30p should be possible through a single 12.5 Gb/s link (including blanking, 8b/10b overhead, etc.). PG235 seems like the ideal starting point, and I have that working at 4k video. So all I need is to interface the AXI-S from the HDMI-Rx to a GTX-Tx, and on the other end interfacing the GTX-Rx to the AXI-S going into the HDMI-Tx.
Does that sound right? Is there some example design that connects HDMI directly to a transceiver? If not, should I be looking at Aurora to do this connection, or is that overkill? Or do I just attempt to hook up the ports between the HDMI AXI-S interfaces and the GTXs myself?
02-09-2020 12:55 AM
What are you trying to do? Xilinx HDMI solution is comprised of HDMI TX/RX Subsystem IP + Video PHY Controller. The Video PHY controller is a GT. HDMI Receiver is to use Video PHY Controller to receive HDMI input, the Video PHY Controller then send its output to HDMI RX Subsystem IP, the HDMI RX Subsystem IP outputs video on native interface or AXI-4 stream interface.
02-10-2020 08:50 AM
Hi nathanx, thanks for responding.
What are you trying to do?
I'm trying to implement an HDMI-to-GTX converter:
Things to note:
What you've described is the Example design that comes with PG235, without the conversion to and from a single GTX. I built the example and it works.
I believe that now I need to interface the AXI-4 stream provided in the example to the single GTX. I'm thinking this could be done either by:
I have a fair amount of FPGA experience, but haven't used AXI or transceivers, so would appreciate any perspective on which of these four I should be pursuing.
02-13-2020 01:28 PM
How do you recover pixel clock from one GTX ?
If you don't have any idea, I suggest you to learn DisplayPort.
Your concept is similar to DisplayPort and it's HDMI to DP bridge IC.