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Observer thomas1974
Observer
11,914 Views
Registered: ‎05-16-2012

HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

I am trying to get HDMI / DVI video from th Atlys.

 

In this topic here,

http://forums.xilinx.com/t5/Spartan-Family-FPGAs/xapp495-big-problem/td-p/138728/page/3

 

there is a discussion how to run the two demos "vct_demo" and "dvi_demo" coming with the XAP 495. I tried to compile them  (with ISE 14.6 and 14.7) and failed because of the following errors:

 

--------------------------------------------

for the dvi_demo:

 

ERROR:HDLCompiler:1511 - "C:\Xil\AtlysDemos\Atlys_495_TMDS\rtl\rx\serdes_1_to_5_diff_data.v" Line 82: Mix of blocking and non-blocking assignments to variable <inc_data_int> is not a recommended coding practice.

 

--------------------------------------------

for the vct_demo:

 

ERROR:PhysDesignRules:2502 - Issue with pin connections and/or configuration on
   block:<sysclk_div>:<BUFIO2_BUFIO2>.  BUFIO2 has an invalid setting of DIVIDE
   by 2. This setting is not supported. For more information please see Answer
   Record 56113.
ERROR:Pack:1642 - Errors in physical DRC.

 

---------------------------------------------

 

I simply imported all the *.v files as well as the corresponding *.ucf and pressed implement. For both of the projects, I double checked if all *.v referenced are found and this is the case. Nothing is missing. The Chip is set correctly to the Atlys' Spartan too.

 

Anybody there, who has an idea adout that?

 

I checked the answer record referenced, but it did not help,

 

Other examples for the Atyls I took from the web compile and do work fine, so it does not seem to be a general problem of the 14.6 or 14.7 or Spartan or the Atlys or any project setting.

 

Can this here be a simple version issue? - Is it a matter of error level which is stricter than in former versions?

 

Can somebody confirm that the example compiles with former versions? Which one?

I have seen, that in the docu 12.4 was referenced to work properly. For some reasons, I cannot use versions below 14.x easily here and should have very strong reasons to work with older ISE versions.

 

I already inspected these threads with similar issues but got no help.

http://forums.xilinx.com/t5/Embedded-Development-Tools/Digilent-Atlys-board-HDMI-interface/m-p/266454#M24484

http://forums.xilinx.com/t5/Spartan-Family-FPGAs/HDMI-i-o-example-for-Digilent-Spartan-6/m-p/368939#M22592

 

Any help is appreciated.

 

THX

 

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9 Replies
Observer thomas1974
Observer
11,913 Views
Registered: ‎05-16-2012

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

Of course I also would be interested in a working Xilinx Project.

 

Since i do not expect that people are willing or are allowed to post their business work (code) here, I would also be confident with a Xilinx Atlys bit-file - just to proove to my me and my boss, that this Atlys board here and it's HW works for HDMI output and it is worth continuing.

 

 

 

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Visitor gre54
Visitor
11,838 Views
Registered: ‎02-12-2014

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

thomas1974

 

I am getting the same error whilst trying to build xapp495 using ise 14.7.    Another discussion suggested xapp495 was originally designed and build using ise 12.3.  The dvi_demo blocking issue produced only a warning in earlier ise versions. However, it's the vtc_demo issue I'd like to resolve.  Did you manage to resolve your problem eventually?

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Participant elitezhe
Participant
11,785 Views
Registered: ‎01-10-2014

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

Hi , thomas I have run into the same problem. My ISE version is 14.6 and my OS is win7 ultimate x64. If you have solved this problem, could you please post the solution? Thanks. Besides, i have also follow many Digilent documents to build projects, but when it comes to implement, there will also be errors. It will drive me crazy!!....
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Newbie eafox
Newbie
11,544 Views
Registered: ‎04-08-2014

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

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Observer thomas1974
Observer
11,535 Views
Registered: ‎05-16-2012

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

Hm, I do not completely understand, what is the point about thih and how I an correct this.

Does this mean, that in former Xilinx Versions this was an undisvocered / accepted bad decription which now is promoted to en error?

 

Or is the design not right at all?

 

 

 

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Observer thomas1974
Observer
9,979 Views
Registered: ‎05-16-2012

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

In answering the above question: Issue 1 is solved the given way by uncommenting the relevat code line (#234      //inc_data_int <= debug_in[1] ; )

 

but the other issue with the VTC-DEMO is still there. No idea about this. I am sure I have added all files, there is nothing marked missing in the project view.

 

The tool still reports the error with the BUFIO_2, but I am not even able to locate this in the files. I assume this is an automatically instantiated buffer, performed by the tool, but without impropper settings or whatever.

 

 

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Observer thomas1974
Observer
9,978 Views
Registered: ‎05-16-2012

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

Here are the relevant lines:

 

In one file, they use 25MHz, in the other one 50MHz

 

WORKS

  ////////////////////////////////////////////////////
  // 25 MHz and switch debouncers
  ////////////////////////////////////////////////////
  wire clk25, clk25m;

  BUFIO2 #(.DIVIDE_BYPASS("FALSE"), .DIVIDE(5))
  sysclk_div (.DIVCLK(clk25m), .IOCLK(), .SERDESSTROBE(), .I(clk100));

  BUFG clk25_buf (.I(clk25m), .O(clk25));

 

 

DOES NOT WORK

 

  IBUF sysclk_buf (.I(SYS_CLK), .O(sysclk));

  BUFIO2 #(.DIVIDE_BYPASS("FALSE"), .DIVIDE(2))
  sysclk_div (.DIVCLK(clk50m), .IOCLK(), .SERDESSTROBE(), .I(sysclk));

  BUFG clk50m_bufgbufg (.I(clk50m), .O(clk50m_bufg));

 

-----------------

Devide by 2 makes sense to me, because of the 100MHz OSC used with ATLYS.

 

 

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Visitor yetanotherid
Visitor
8,779 Views
Registered: ‎12-08-2014

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

I am currently struggling with this same issue.  Starting with ISE 14.6, the use of the divide by 2 setting in BUFIO2 was promoted from warning to fatal error.  See this page, aka Answer Record 56113:

 

http://www.xilinx.com/support/answers/56113.html

 

That page details some potential solutions, which are all methods of generating the required 50 MHz signal from the 100 MHz system clock.

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Visitor yetanotherid
Visitor
8,772 Views
Registered: ‎12-08-2014

Re: HDMI (TMDS) output with Digilent Atlys - examples do not compile with ISE 14

For the record, I was able to get the vtc_demo to work in ISE 14.6 by modifying vtc_demo.v thusly:

 

// Original code, doesn't work on ISE >= 14.6
//  BUFIO2 #(.DIVIDE_BYPASS("FALSE"), .DIVIDE(2))
//  sysclk_div (.DIVCLK(clk50m), .IOCLK(), .SERDESSTROBE(), .I(sysclk));

  wire clkfb;

   DCM_SP #(
      .CLKDV_DIVIDE(2.0),
      .CLKFX_DIVIDE(1),
      .CLKFX_MULTIPLY(4),
      .CLKIN_DIVIDE_BY_2("TRUE"),
      .CLKIN_PERIOD(10.0),       
      .CLKOUT_PHASE_SHIFT("NONE"),
      .CLK_FEEDBACK("1X"),        
      .DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"),
      .DFS_FREQUENCY_MODE("LOW"),         
      .DLL_FREQUENCY_MODE("LOW"),         
      .DSS_MODE("NONE"),                  
      .DUTY_CYCLE_CORRECTION("TRUE"),     
      .FACTORY_JF(16'hc080),              
      .PHASE_SHIFT(0),                    
      .STARTUP_WAIT("FALSE")              
   )
   DCM_SP_inst (
      .CLK0(clk50m),
      .CLK180(),    
      .CLK270(),    
      .CLK2X(),     
      .CLK2X180(),  
      .CLK90(),     
      .CLKDV(),     
      .CLKFX(),     
      .CLKFX180(),  
      .LOCKED(),    
      .PSDONE(),    
      .STATUS(),    
      .CLKFB(clkfb),
      .CLKIN(sysclk),
      .DSSEN(1'b0),  
      .PSCLK(1'b0),  
      .PSEN(1'b0),   
      .PSINCDEC(1'b0),
      .RST(1'b0)      
   );
	
   BUFIO2FB #( .DIVIDE_BYPASS("TRUE") )
   BUFIO2FB_inst ( .O(clkfb), .I(clk50m) );

 

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