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Observer abdelkader
Observer
1,440 Views
Registered: ‎12-06-2011

INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hello dear members,

 

I am working on testing HD-SDI 292M IP in Artix-7 evaluation kit without using the FMC modules. So i think about two ideas:

 

1- Loading a MIRE or image to the board and read it using the HD-SDI 292M IP.

2- Interfaceing a pattern generator with HD-SDI 292M IP.

 

My question are:

1- The proposed solutions are there possible?

2- If yes, who to ? have you any propositions?

 

Thank you in advance

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Moderator
Moderator
2,078 Views
Registered: ‎11-09-2015

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hi @abdelkader,

 

Again, It will be complicated to test RX. The only solution I see is the loopback directly at the GT level.

 

You can use the TPG IP which is available for all devices in vivado. Or the xapp1097 should have a pattern generator directly for the SDI IP


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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11 Replies
Moderator
Moderator
1,411 Views
Registered: ‎11-09-2015

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hi @abdelkader,

 

Do you want to use the SD/HD/3G SDI IP? Do you plan do do TX or RX? Do you want to do the test in simulation or in HW?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer abdelkader
Observer
1,406 Views
Registered: ‎12-06-2011

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Thank you for your return Florentw.

 

Yes i want to use the SD/HD/3G SDI IP for both TX and RX with the 292M and the 259M.

For tests, i am motivated to do the simulation and then HW to validate the architecture.

 

As i mentioned, i think about making RX by reading a video or image from the test pattern generator, and then i do the TX to test and display. After that if this step is validated,, i will add processing like ROI. My interest now turn around successfully making RX an TX.

 

If doing this using TPG is not possible, the PCI express present a good solution?

 

Respectfully

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Moderator
Moderator
1,398 Views
Registered: ‎11-09-2015

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hi @abdelkader,

 

The TPG would be to test TX not RX... If you need to test RX you need to have a TX outside the board.

 

You might be able to loopback the GTs directly but it might takes some effort.

 

For TX you could add an ILA to see what is outputted from your GTs


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Observer abdelkader
Observer
1,391 Views
Registered: ‎12-06-2011

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Thank you for these clarifications.

 

And what you think about using PCE Express to load HD video t othe board?

 

Thank you in advance.

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Moderator
Moderator
1,385 Views
Registered: ‎11-09-2015

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hi @abdelkader,

 

I don't really see why or how you want to use the PCIe. It won't give you better result than the TPG...


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Observer abdelkader
Observer
1,383 Views
Registered: ‎12-06-2011

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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I am thinking about a solution to test the RX without using FMC modules or external GTP.

Have you an idea about how to design a test pattern generation in Atrix-7? I will start by work on it and then integrate the SDI (RX, TX).

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Moderator
Moderator
2,079 Views
Registered: ‎11-09-2015

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hi @abdelkader,

 

Again, It will be complicated to test RX. The only solution I see is the loopback directly at the GT level.

 

You can use the TPG IP which is available for all devices in vivado. Or the xapp1097 should have a pattern generator directly for the SDI IP


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Observer abdelkader
Observer
1,365 Views
Registered: ‎12-06-2011

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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I am working on it.

 

Is it possible to read from camera using the only Artix-7 GTP and display it in a screen using HDMI Out interface?

I think if it's possible it will be better solution no?

 

 

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Moderator
Moderator
1,363 Views
Registered: ‎11-09-2015

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hi @abdelkader,

 

Yes this is possible.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Observer abdelkader
Observer
682 Views
Registered: ‎12-06-2011

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hi Florentw;

 

May you assiste me how to do? or Suggest me a guide to do this? I'll appreciate that.

 

Thank you in advance

 

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Moderator
Moderator
681 Views
Registered: ‎11-09-2015

Re: INTERFACE PATTERN GENERATOR WITH HD-SDI 292M IP in ARTIX-7

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Hi @abdelkader,

 

Please create a new topic. Give as many information as you can (which board do you want to use (custom/xilinx...)? what is the interface of your camera? what do you want to achieve)


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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