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Observer reza1
Observer
5,471 Views
Registered: ‎07-10-2017

Image sensor SLVS-EC output interface to Artix-7 GTP

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Hello,

I need to capture the 2.3Gbps SLVS-EC output data of an image sensor by using  Artix-7 (i.e. XC7A75T or XC7A15T) GTP.

 

Here are the SLVS-EC specs

160mV < Vcm < 260mV

140mV < Vdiff(ac) < 290mV

 

I will ac couple the SLVS outputs to MGTPRXP0/N0 but concerned about the Vdiff swing.

Is 140mV < Vdiff(ac) < 290mV enough for driving the Artix-7 GTP RXs (MGTPRXP0/N0)?

 

Page 49/63 of DS181_Artix-7_dc-ac-characteristics Table 50 says,

 

GTP Transceiver DC Specifications

DVPPIN: "Differential peak-to-peak input voltage" when "External AC coupled" should be in (150 – 2000) mV range which will NOT cover the SLVS output level 140mV < Vdiff < 290mV

 

Please let me know your thoughts.

Thanks,

Reza

 

 

 

 

 

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Adventurer
Adventurer
8,265 Views
Registered: ‎05-26-2015

Re: Image sensor SLVS-EC output interface to Artix-7 GTP

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@reza1  There is new information on this topic. The GTP can support SLVS-EC.  See Quentin Halls recent post below.   

 

Reza,

 

Like you said your SLVS-EC input is not compatible with GTP transceiver with respect to IO standard. More over you need to control the GTP transceiver all by your self, unlike other protocols like Aurora, SGMII, Video PHY etc. I don't see any FPGA based solution on this other than https://www.m-pression.com/solutions/hardware/slvs-ec-rx-ipPlease try to contact your nearest Xilinx support team to get more information on this.

 

-- Shashidhar

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Adventurer
Adventurer
5,433 Views
Registered: ‎05-26-2015

Re: Image sensor SLVS-EC output interface to Artix-7 GTP

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@reza1,

 

Which interface(Like MIPI-DPHY, C-PHY etc) are you using?  

Can you share the Image sensor part number?

 

See XAPP894 as it might be useful.

https://www.xilinx.com/support/documentation/application_notes/xapp894-d-phy-solutions.pdf

 

Regards,

Shashidhar

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Observer reza1
Observer
5,413 Views
Registered: ‎07-10-2017

Re: Image sensor SLVS-EC output interface to Artix-7 GTP

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Shashidhar,

It is one of imx image sensors from Sony.

Signaling protocol is SLVS-EC (Scalable Low Voltage Signalling with Embedded Clock), a new interface which could be as high as 2.304Gbps for some of their new sensors.

 

It is NOT MIPI M-PHY just a single SLVS-EC diff pair carrying "Clock mixed with Data + 8B/10B".

Artix-7 GTP will recover the clock and data on the receiver side.

 

SLVS-EC to LVDS buffer is one solution but don't like to add them because of spacing issue and looking for a different solution.

Artix-7 BLVDS_25 is good down to Vdiff=100mVpp but for less than 950Mbps (DDR).

 

Your thoughts?

 

Thanks,

-Reza 

 

 

 

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Adventurer
Adventurer
8,266 Views
Registered: ‎05-26-2015

Re: Image sensor SLVS-EC output interface to Artix-7 GTP

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@reza1  There is new information on this topic. The GTP can support SLVS-EC.  See Quentin Halls recent post below.   

 

Reza,

 

Like you said your SLVS-EC input is not compatible with GTP transceiver with respect to IO standard. More over you need to control the GTP transceiver all by your self, unlike other protocols like Aurora, SGMII, Video PHY etc. I don't see any FPGA based solution on this other than https://www.m-pression.com/solutions/hardware/slvs-ec-rx-ipPlease try to contact your nearest Xilinx support team to get more information on this.

 

-- Shashidhar

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Explorer
Explorer
3,255 Views
Registered: ‎10-24-2008

Re: Image sensor SLVS-EC output interface to Artix-7 GTP

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Hi folks,

 

I believe that there is some confusion here.  Sony defines VDIF_AC_TX as a peak value measured as 1/2 the Tx eye height.  Xilinx DVppin is a peak-peak value. Thus, even without considering the benefits of of Rx equalization, at this time we understand there to be ample link margin to support SLVS-EC implementations with Xilinx FPGAs.  I would recommend that you work with your local Xilinx / Avnet FAE on the details of such an implementation.  We are confident that we can support these requirements with IP from Xilinx partner FRAMOS.

 

--Quenton