Import xps project of zynq zc702 into a simulink model using system generator
I am trying to import xps project by using edk processor block for a simulink model using Xilinx System Generator tool. the xps project is to target zynq zc702 evaluation kit, which consists of processing system 7 with an IP or without any IP, got first an error that the number of clocks =3 , and it supports only one, so i removed in system.mhs file from the processing_system7_0_DDR_Clk and processing_system7_0_DDR_Clk_n "SIGIS = CLK" as it was mentioned to solve that error, and then it worked, but another error resulted which i dont know how to solve.
part of system.mhs file:
PORT processing_system7_0_PS_CLK = processing_system7_0_PS_CLK, DIR = I, SIGIS = CLK PORT processing_system7_0_PS_PORB = processing_system7_0_PS_PORB, DIR = I PORT processing_system7_0_DDR_Clk = processing_system7_0_DDR_Clk, DIR = IO #,SIGIS = CLK PORT processing_system7_0_DDR_Clk_n = processing_system7_0_DDR_Clk_n, DIR = IO #,SIGIS = CLK
here the error i cant solve:
ERROR:EDK - xget_value processor parameter INSTANCE : a null handle was provided ERROR:SYSGEN: encounter error when importing XPS project (return status: expected integer but got "processor").