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Adventurer
Adventurer
340 Views
Registered: ‎04-16-2019

Issues Supporting 2 SDI Video Inputs

Hello Xilinx Forums,

I am developing on a custom board and trying to support 2 SDI inputs. I have successfully implemented the TRD and now adding the second SDI input. I am at the stage where I have both SDI rx SS operational, however, I am receiving video lock/unlock interrupts whenever I have both inputs plugged in. Both SDI rx SS's do not share the same interrupt and the both have their own respective drivers. Both SDI inputs reside on the same transciever bank, and same reference clock.

I have tested both SDI inputs individually and see no issues. Could I have a crosstalking issue or configuration issue? 

Thank you.

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Participant
Participant
274 Views
Registered: ‎06-18-2019

Re: Issues Supporting 2 SDI Video Inputs

Hi I am doing something similar at the moment with 4 SDI rx chains. I also get continuous interrupts generated with loss lock when I have it running the SDI_Rx example firmware. I have been trying to debug it and I don't see my GT IP losing lock. I observed it's the UHD SD Rx subsystem generating loss off lock. Narrowing down I find they the SMPTE detect stream format register changes often with the same SDI video. I will watch this space if anyone knows.

regards

bade

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Moderator
Moderator
216 Views
Registered: ‎04-12-2017

Re: Issues Supporting 2 SDI Video Inputs

Hello @jchewpoc 

Is this a system with OS(built using petalinux) or its a standalone system?

What is the device on which you are testing this?

Can we have a quick look into your block design? if you can share with us completely populated BD saved as BD would be helpful to comment further.

Regards

Kunal

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Adventurer
Adventurer
172 Views
Registered: ‎04-16-2019

Re: Issues Supporting 2 SDI Video Inputs

Hello @kvasantr ,

I am using buildroot to build my kernel OS, however, I am using Xilinx's linux 2019.1 branch on git. A quick update, I did get the 2 channel SDI inputs working on another custom development board I have, that has a different pinout. I do not believe it is a block design issue anymore, and it is most likely a hardware issue. Any recommendations on good high speed video design practices or video guidelines you can share?

Thank you.

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Moderator
Moderator
79 Views
Registered: ‎11-09-2015

Re: Issues Supporting 2 SDI Video Inputs

Hi @jchewpoc 

To debug issues related to the UHD-SDI RX Subsystem you might want to follow the debugging section of PG290

Also this xapp can help looking at the GTs element (draw an eye diagram, check the PLL lock status...): xapp1295


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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