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Adventurer
Adventurer
3,058 Views
Registered: ‎05-26-2015

MIPI CSI-2 interface with KC705

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Hi,
 
We are planning to implement a MIPI CSI2 interface with a Image sensor with KC705. We have two solutions that are readily available for MIPI IP.
 
1. Xilinx MIPI CSI-2 Receiver Subsystem    2. Northwest Logic's MIPI CSI-2 RX controller with MIPI D-PHY
 
It seems that Xilinx IP is not yet into production(Beta version). Is it a good idea to use Beta version IPs for new product development or should I go with Northwest logic? Has any one worked with those IPs? Please reply.
 
 The Image sensor outputs the data at the rate of 120 Fps in RAW-10 bit format by using single lane interface.
 
fidus MIPI FMC Board.jpg
 
 
-- Shahsidhar
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Moderator
Moderator
5,351 Views
Registered: ‎08-01-2007

Re: MIPI CSI-2 interface with KC705

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Xilinx has customers successfully use MIPI CSI-2 RX subsystem on 7 series. Due to the fact that 7 series FPGA do not have I/O that can natively support D-PHY. So XAPP894 provides two solutions, one is compilant solution, which provides a high-performance MIPI D-PHY interface at the FPGA level using external component - Meticom IC. The Meticom components in front of the FPGA perform all electrical functionality required by the D-PHY specification. The other solution is to use resistor network solution(named as compatible solution in XAPP894), note it allows communication up to 800 Mb/s between an FPGA and a MIPI device. If the line rate exceeds 800 Mbps, you need to use the first solution.

 

For more info, see XAPP894.

https://www.xilinx.com/support/documentation/application_notes/xapp894-d-phy-solutions.pdf

 

2 Replies
Moderator
Moderator
5,352 Views
Registered: ‎08-01-2007

Re: MIPI CSI-2 interface with KC705

Jump to solution

Xilinx has customers successfully use MIPI CSI-2 RX subsystem on 7 series. Due to the fact that 7 series FPGA do not have I/O that can natively support D-PHY. So XAPP894 provides two solutions, one is compilant solution, which provides a high-performance MIPI D-PHY interface at the FPGA level using external component - Meticom IC. The Meticom components in front of the FPGA perform all electrical functionality required by the D-PHY specification. The other solution is to use resistor network solution(named as compatible solution in XAPP894), note it allows communication up to 800 Mb/s between an FPGA and a MIPI device. If the line rate exceeds 800 Mbps, you need to use the first solution.

 

For more info, see XAPP894.

https://www.xilinx.com/support/documentation/application_notes/xapp894-d-phy-solutions.pdf

 

Adventurer
Adventurer
3,005 Views
Registered: ‎05-26-2015

Re: MIPI CSI-2 interface with KC705

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Thanks @nathanx for the reply.

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