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Visitor hubp
Visitor
771 Views
Registered: ‎10-24-2017

MIPI D-PHY (4.1) pin selection on Zynq UltraScale

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Hello

I am working with the MIPI D-PHY (4.1) IP in Vivado 2018.3 with the device xczu7ev-fbvb900-2-i. When using the IP configuration wizard for selecting the pins for the CSI data and clock lines I can only select the pins of the first byte of each HP bank. When I set the pins in the CONFIG parameters of the IP I can select also the pins of the other bytes and am able to implement the design. Is this a bug in the configuration wizard or is there a reason for this behavior?

Best Regards,
Philipp

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Xilinx Employee
Xilinx Employee
689 Views
Registered: ‎03-30-2016

Re: MIPI D-PHY (4.1) pin selection on Zynq UltraScale

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Hello Phillip

I did not aware of any issue regarding pin assignment in the latest version of MIPI D-PHY wizard GUI.

If you are selecting DBC (Dedicated Byte Clock) pin as MIPI clock pin, (see red rectangle)
then only pin on the same byte can be selected as data pins.

If you are selecting QBC (Quad Byte Clock) pin as a MIPI clock pin,  (see blue rectangle)
then you can select pins on other bytes as data pins.

0110_EC_for_Phillip.png

 

See the following example, I can select pins other bytes if I can  select QBC pin as clock pin.
-- Note1:We do not recommend non-continous pin assignment like this

-- Note2:
   You may also want to check the pin assignment limitation details on PG202 Appendix C and UG571.

0110_EC_for_Phillip_example.png


> When I set the pins in the CONFIG parameters of the IP I can select also the pins of the other bytes and am able to implement the design

I do not understand this sentences.  Did you modify the tcl script for the IP generation ?
We recommend pin selection method using wizard GUI.


Thanks & regards
Leo


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Xilinx Employee
Xilinx Employee
690 Views
Registered: ‎03-30-2016

Re: MIPI D-PHY (4.1) pin selection on Zynq UltraScale

Jump to solution

Hello Phillip

I did not aware of any issue regarding pin assignment in the latest version of MIPI D-PHY wizard GUI.

If you are selecting DBC (Dedicated Byte Clock) pin as MIPI clock pin, (see red rectangle)
then only pin on the same byte can be selected as data pins.

If you are selecting QBC (Quad Byte Clock) pin as a MIPI clock pin,  (see blue rectangle)
then you can select pins on other bytes as data pins.

0110_EC_for_Phillip.png

 

See the following example, I can select pins other bytes if I can  select QBC pin as clock pin.
-- Note1:We do not recommend non-continous pin assignment like this

-- Note2:
   You may also want to check the pin assignment limitation details on PG202 Appendix C and UG571.

0110_EC_for_Phillip_example.png


> When I set the pins in the CONFIG parameters of the IP I can select also the pins of the other bytes and am able to implement the design

I do not understand this sentences.  Did you modify the tcl script for the IP generation ?
We recommend pin selection method using wizard GUI.


Thanks & regards
Leo


Tags (4)
Visitor hubp
Visitor
677 Views
Registered: ‎10-24-2017

Re: MIPI D-PHY (4.1) pin selection on Zynq UltraScale

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Hello Leo

Thanks for your answer. I was selecting the pins in the wrong order. I tried to assign the data lane pins before assigning the clock lane pins, so the desired pins haven't been visible in the wizard. I didn't realize that the the available pins in the selection for the clock pins haven't been the same as the available pins in the selection for the data lane pins. So i changed the pins by selecting the IP in the block design and editing the Properties in the Block Properties table. There the I could select all pins as desired.

I tried now in the wizard to select first the clock lane and then all the possible data lane pins have been available for select as desire. So it was my fault.

Thanks a lot.

Best Regards,
Philipp

Xilinx Employee
Xilinx Employee
666 Views
Registered: ‎03-30-2016

Re: MIPI D-PHY (4.1) pin selection on Zynq UltraScale

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Hello Philipp @hubp

Thanks for the update.
Could you please kindly marked this thread as solved , so anyone else can learn from your experience ?

Thanks & regards
Leo

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