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Observer ibrahimsangi
Observer
490 Views
Registered: ‎01-24-2019

MIPI D-Phy Hack

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I am trying to connect the MIPI 2 lane camera. And camera D-phy is configured to use

M5 as clock

L2 as Data[0]

L4 as Data[1]

But the problem is, in my hardware the L4 pair is not routed to the camera. instead there is another pair from same bank65 is routed to data[1] which is J5.

Is it possible that we can configure J5 seperately as differential pair input pins and connect that pair back to L4 internally FPGA. This could save us a lot.

I don't want to do an external rework on FPGA. If we can connect L4 to J5 and L3 to H5 internally in FPGA that would be great.

thanks

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Observer ibrahimsangi
Observer
395 Views
Registered: ‎01-24-2019

Re: MIPI D-Phy Hack

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Well, it is working with different pin assignments. I had to swap all of them.

 

J5 Clock,

M5 Data[0]

L2 Data[1]

I successfully generated and tested this configuration. Which worked for us.

Thank you.

View solution in original post

3 Replies
Xilinx Employee
Xilinx Employee
461 Views
Registered: ‎03-30-2016

Re: MIPI D-Phy Hack

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Hello Ibrahim @ibrahimsangi 

>Is it possible that we can configure J5 seperately as differential pair input pins and connect that pair back to L4 internally FPGA. This could save us a lot.
>I don't want to do an external rework on FPGA. If we can connect L4 to J5 and L3 to H5 internally in FPGA that would be great.

I don't think this is possible.


All you need to do is to re-open your MIPI CSI-2 RX Subsystem GUI, and set the new pin-assigment setting, and re-do Vivado implementation.
I do not know what device-model you are using, but since L4 and J5 are in the same bank, this pin-assignment modification is possible.

1. If L4 and J5 are in the same-byte, you can use your current clock-pin (M5).
2. If L4 and J5 are in different-byte, Please ensure that your current clock-pin (M5) is a QBC(Quad-Byte-Clock) pin not DBC pin. Pleasere-run Vivado Implementation to check if your new pin-assignment is good.

Thanks & regards
Leo

Moderator
Moderator
416 Views
Registered: ‎11-09-2015

Re: MIPI D-Phy Hack

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Hi @ibrahimsangi 

Do you have any update on this? Was @karnanl 's reply enough for you?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Observer ibrahimsangi
Observer
396 Views
Registered: ‎01-24-2019

Re: MIPI D-Phy Hack

Jump to solution

Well, it is working with different pin assignments. I had to swap all of them.

 

J5 Clock,

M5 Data[0]

L2 Data[1]

I successfully generated and tested this configuration. Which worked for us.

Thank you.

View solution in original post