I have an old design with multiple Core Generated components that were created using the old IP/Core generator (I have a version 7.0 accumulator, for example).
I can't even find a datasheet on the Accumulator 7.0 to make sure the CSET values map correctly to the new Core Generated IP. Does anyone have a suggestion about the best way to go about this?
Right now my two ideas are: Find the data sheets for the two implemetations, and recreate the IP in the new version.
The second idea: Download an older Xilinx ISE, upgrade the IP, then use the newer ISE to upgrade it the rest of the way.