Hello, I'm trying to implement a matlab code into a sysgen block diagram.
The code analyzes an audio signal in frames of 512 (frames ovelapped by each other by 75%, hop 128 bits), which are multiplied with a hanning window, and then are synthesized again with different overlapping (hop 149 bits). The objective of my code is to implement a pitch shifting effect in future, by resampling my output signal.
Here is the basic part of the matlab code. The "window" variable is a hanning window created by matlab. N is 512, the frame length.
for u=1:frame_count Xu_current = window.*input(u*Ra:u*Ra+N-1); % analyze current frame, Ra=128 bits output(u*Rs:u*Rs+N-1) = output(u*Rs:u*Rs+N-1) + Xu_current; % add current frame to output, Rs=149 bits end
I'm implementing this using two Dual Port RAMs. The first is used for the synthesis, with a counter which points the address going from 0 to 512, then from 128 to 640, etc, to calculate each frame. The second RAM is used for the synthesis, going from 0 to 512, then from 149 to 661, etc, the same way.
When the simulation finishes I get a problem during the synthesis (a totally false output signal), when I try to add my frames again in the output. Am I doing something wrong with my implementation using the Dual Port RAM?
I am attaching the matlab code, my.mdl design so far, the .wav file that I import, and also the matlab workspace needed to import this with the "from workspace" block.
Thank you in advance, for other information needed please ask me.