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Observer dave91
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Registered: ‎06-02-2019

Maximum resolution Video Processing Subsystem

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Hello,

I'm working with the Zynq UltraScale+ MPSoC Base TRD 2018.3 and want to konfigure the MIPI CSI Capture Pipeline to 8k resolution.

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/45940846/Zynq+UltraScale+MPSoC+Base+TRD+2018.3

In the Re-Custumize IP settings of the Video Processing Subsystem (2.0) there is the opportunity to set the Pixels up to 8192 and the Lines up to 4320. The IP Product Guide says the supportet resolutions is up to 4096 x 2160. So whats the reason for that difference and is it possible to configure the pipeline to 8k?

 

grafik.png

 

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Moderator
Moderator
301 Views
Registered: ‎11-09-2015

Re: Maximum resolution Video Processing Subsystem

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Hi @dave91 

This is documented in AR#71950. The GUI is incorrect in 2018.3. Only 4K is supported. 8K support is introduced in 2019.1 however I am not sure how the linux drivers and TRD will support it (the TRD is still tested up to 4K)

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

1 Reply
Moderator
Moderator
302 Views
Registered: ‎11-09-2015

Re: Maximum resolution Video Processing Subsystem

Jump to solution

Hi @dave91 

This is documented in AR#71950. The GUI is incorrect in 2018.3. Only 4K is supported. 8K support is introduced in 2019.1 however I am not sure how the linux drivers and TRD will support it (the TRD is still tested up to 4K)

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post