UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Participant brianvg
Participant
393 Views
Registered: ‎11-02-2014

Memory 2 Memory without additional elements data path.

Hi,

 

I am trying to replicate the data pipeline described here: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/80707705/Mem+2+Mem+without+any+Sub-device+device

In my design. Unfortunately, the wiki does not contain any information about the actual settings for the frame buffer engines. I have tried several combinations of different "8 bit video formats" settings, but when I test the pipeline I have a couple of issues that pop up. My device tree is as described on the wiki page. The provided gstreamer test command:

gst-launch-1.0 videotestsrc num-buffers=10 ! video/x-raw, width=1920, height=1080, format=RGB ! v4l2video0convert capture-io-mode=4 output-io-mode=4 disable_passthrough=1 ! video/x-raw, width=1920, height=1080, format=RGB ! filesink location=tmp0.rgb
 
 
Firstly always fails with the message:
 
WARNING: erroneous pipeline: no property "disable_passthrough" in element "v4l2video0convert0"
Ok, so I remove the disable_passthrough setting. Again it fails, this time with this message:
 
WARNING: erroneous pipeline: could not link videotestsrc0 to v4l2video0convert0, v4l2video0convert0 can't handle caps video/x-raw, width=(int)1920, height=(int)1080, format=(string)RGB
 
I then checked the capabilities with v4l2-ctl:
zynqmp> v4l2-ctl --all
Driver Info (not using libv4l2):
        Driver name   : xilinx-mem2mem
        Card type     : xilinx-mem2mem
        Bus info      : xilinx-mem2mem
        Driver version: 4.14.0
        Capabilities  : 0x84204000
                Video Memory-to-Memory Multiplanar
                Streaming
                Extended Pix Format
                Device Capabilities
        Device Caps   : 0x04204000
                Video Memory-to-Memory Multiplanar
                Streaming
                Extended Pix Format
Priority: 2
Format Video Capture Multiplanar:
        Width/Height      : 1920/1080
        Pixel Format      : 'NV12'
        Field             : None
        Number of planes  : 0
        Flags             :
        Colorspace        : Default
        Transfer Function : Default
        YCbCr Encoding    : Default
        Quantization      : Default
Format Video Output Multiplanar:
        Width/Height      : 0/0
        Pixel Format      : ''
        Field             : Any
        Number of planes  : 0
        Flags             :
        Colorspace        : Default
        Transfer Function : Default
        YCbCr Encoding    : Default
        Quantization      : Default
Ahh ha! Only NV12 seems to be supported. If I set up NV12 in the gstreamer pipeline, then it works as expected.

What am I doing wrong? I would like to have the capabilities in the IP core and device tree reflected in the data path. I would like to be able to transfer RGB at least, so that I can send my camera data down to the fabric.
 
I am using OSL workflow, kernel is 2018.3 tag- I have all the gstreamer plugins and bells and whistles installed... unless I missed something?
 
@Xilinx : Nice job with the Wiki. It makes all of this information much easier to navigate!
 
Thanks for any help!
 
Brian
 
Tags (1)
0 Kudos
6 Replies
Participant brianvg
Participant
341 Views
Registered: ‎11-02-2014

Re: Memory 2 Memory without additional elements data path.

Hi,


Has really no one tried the design mentioned in the Wiki? I could really use some help here.

 

Best Regards,

 

Brian

0 Kudos
Participant brianvg
Participant
290 Views
Registered: ‎11-02-2014

Re: Memory 2 Memory without additional elements data path.

Hi Xilinx Employees,

I have now tested with Petalinux. If it matters to any of you, the information in the Wiki appears to be incorrect or misleading. Using Petalinux, I also only see NV12 available. This may be caused by incorrect settings of the (Framebuffer) IP cores, but if this is correct then you do not provide enough information in the Wiki to reproduce the design content.

-Brian

Xilinx Employee
Xilinx Employee
276 Views
Registered: ‎11-21-2018

Re: Memory 2 Memory without additional elements data path.

Hi Brian,

Great thanks for flagging that!

I'm trying to recreate the issue now, so I will let you know my progress.

Regards,

Aoife
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
0 Kudos
Xilinx Employee
Xilinx Employee
119 Views
Registered: ‎11-21-2018

Re: Memory 2 Memory without additional elements data path.

Hi @brianvg 

I've discussed this issue with the author of the Wiki page and it seems the example can only run on 2019.1 and above.

I agree that this should have been clearly stated on the Wiki page, so I am currenlty updating it with more information.

Sorry for the inconvenience.

Thanks for letting us know about this issue. 

 

Regards, 

 

 

Aoife
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
112 Views
Registered: ‎02-09-2017

Re: Memory 2 Memory without additional elements data path.

Hi Aoife,

Thanks for the clarification!

Is it possible to patch the functionality to 2018.3, or should I just wait for the 2019.3 release?

Best Regards,

Brian

0 Kudos
Xilinx Employee
Xilinx Employee
102 Views
Registered: ‎11-21-2018

Re: Memory 2 Memory without additional elements data path.

Hi brian.vongunten@speedgoat.ch

Unfortunately there is no patch currently available, so you would have to wait for the 2019 release. 

 

Regards, 

Aoife
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**