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Explorer
Explorer
1,896 Views
Registered: ‎07-06-2016

PL correct frequency for video application with VDMA

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Hello,

 

I'm working on a video application with a ZYNQ device. At the moment I've got implemented and working the next simple video chain: 

an input video stream coming from a VGA CMOS sensor @25MHz, VDMA with a triple buffer config., a edge detection HLS custom IP and I'm sending some detected edges to the PS through BRAM.

The PL side works @100MHz and everything seems to work fine but when I change the frequency to 200MHz, with the camera in movement I can see how the detected edges get some distortion...

 

I though using higher frequency would help in terms of bandwidth but seems that happens the opposite,   why could it be that?  

 

Thanks.

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Explorer
Explorer
2,076 Views
Registered: ‎07-06-2016

Re: PL correct frequency for video application with VDMA

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Hi @florentw, yes, I manged to run the testbench for the vdma and changing the MM2S to master and S2MM slave helped to fix that overlapping problem for the moment. I'll keep doing tests and see if that happens again, but so far so good.

 

Many thanks.

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Scholar watari
Scholar
1,886 Views
Registered: ‎06-16-2013

Re: PL correct frequency for video application with VDMA

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Hi @joseer

 

Could you show me your block diagram and input frame rate and output frame rate ?

The behaviour depends on these parameters.

 

Best regards,

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Explorer
Explorer
1,880 Views
Registered: ‎07-06-2016

Re: PL correct frequency for video application with VDMA

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Hi @watari, thanks for your answer, this is how the block diagram with the frame rates that I've got implemented in ZYNQ looks like:

 

Drawing1.jpg

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Scholar watari
Scholar
1,872 Views
Registered: ‎06-16-2013

Re: PL correct frequency for video application with VDMA

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Hi @joseer

 

Would you try the followings ?

 

- Separate clock domain on Video in to AXI4 Stream.

- Change clock frequency on AXIS clock from 25MHz to 200MHz.

 

I guess this is FIFO issue. If you try my suggesion, you resolve it.

 

If you don't resolve it, the route cause is frame rate issue or gen lock issue.

Would you show me the frame rate from VGA Camera ?

 

Best regards,

 

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Explorer
Explorer
1,864 Views
Registered: ‎07-06-2016

Re: PL correct frequency for video application with VDMA

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Hi @watari,

 

I can't change the 25MHz input as is the camera frame frequency,  everything works fine when I'm using 100MHz instead 200MHz, with 200MHz works as well but the problem is that I'm having some edges distorted when the camera is moving, and I'd like to understand why could this happens increasing the frequency. It would make more sense to me if this was the other way around and the higher frequency was at the input ..

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Moderator
Moderator
1,831 Views
Registered: ‎11-09-2015

Re: PL correct frequency for video application with VDMA

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Hi @joseer,

 

The first thing I would check is: does you design meet timing when you increase the frequency (i.e. do you have any timing violation)?

If your design does not meet timing, the behaviour of the design cannot be guaranteed. As you increased the frequency I wouldn't be surprise if it does not meet timing now.

 

Then, if it meets timing, do you have the proper constraint for the clock frequency?

 

If everything is fine, I would use an ILA to see the differences between both design at the output of your custom IP.

 

Regards,

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,823 Views
Registered: ‎07-06-2016

Re: PL correct frequency for video application with VDMA

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Hi @florentw,

 

Thanks for your answer, yes, the design meets timing either way (100MHz or 200MHz), and I can't see any errors or warnings regarding timing issues.

 

I'll try to compare both designs with an ILA  and see if there's any difference at my IP output....

 

 

 

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Moderator
Moderator
1,708 Views
Registered: ‎11-09-2015

Re: PL correct frequency for video application with VDMA

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HI @joseer,

 

Did you make any progress on your debugging?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Explorer
Explorer
1,696 Views
Registered: ‎07-06-2016

Re: PL correct frequency for video application with VDMA

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Hi @florentw, thanks for the reply and help.

I detected that working at 200MHz the issue was more noticeable,  but at 100MHz I saw finally the distortion issue as well. The IP is written with HLS so I opened another thread here and I'm now trying to reduce a latency issues that could be related, but I'm still don't have clear how to write a test bench in Vivado to simulate a whole video design,  i.e is it possible to use a bmp image as input of a test bench to feed the VDMA? and like that be able to simulate the whole design? what would be the best simulation approach in Vivado for this design types with VDMA?   

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Moderator
Moderator
1,691 Views
Registered: ‎11-09-2015

Re: PL correct frequency for video application with VDMA

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HI @joseer,

 

Check the chapter 5 of PG020. There is an example design for the VDMA. It might help you get started with simulation.

 

Then when you master this test bench you could read an image. I recommend to use the format ppm for the image as it is easier to read.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Explorer
Explorer
1,037 Views
Registered: ‎07-06-2016

Re: PL correct frequency for video application with VDMA

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Hi @florentw,

 

Thanks for the link, I'll try to use that test bench example and integrate my IP and see how to feed the input with an image, I'll update the results...

 

Regards.

 

 

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Moderator
Moderator
1,013 Views
Registered: ‎11-09-2015

Re: PL correct frequency for video application with VDMA

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Hi @joseer,

 

Do you have any updates on this?

 

Thanks,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Explorer
Explorer
2,077 Views
Registered: ‎07-06-2016

Re: PL correct frequency for video application with VDMA

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Hi @florentw, yes, I manged to run the testbench for the vdma and changing the MM2S to master and S2MM slave helped to fix that overlapping problem for the moment. I'll keep doing tests and see if that happens again, but so far so good.

 

Many thanks.

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