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Adventurer
Adventurer
263 Views
Registered: ‎01-20-2017

Porting DisplayPort to custom board can't generate bitstream

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We are using the Xilinx DisplayPort IP (Version 7.0) to drive a display.  We started with the Xapp1178 example project operating on the KC-705 development board.  We are now developing a custom PCB that also uses a Kintex 7 FPGA (xc7k160tffg676-2).  In Vivado, I have built up an identical system to our KC-705 project.  The new project synthesizes & implements.  However, when I go to generate a bitstream, I get the error:

[Common 17-69] Command failed: This design contains one or more cells for which bitstream generation is not permitted:
design_1_i/displayport_0/inst/support_inst/core_top_inst/dport_link_inst (displayport_v7_0_0_rxlink_top)

We have a license to the DisplayPort IP.  Why can I not generate a bitstream?

 

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Moderator
Moderator
187 Views
Registered: ‎11-09-2015

Re: Porting DisplayPort to custom board can't generate bitstream

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HI @efpkopin 

You should be able to right-click on the block design in the sources window and click reset block design.

Then I am not sure why the tool would pick up a wrong license but it might happen. You might want to make sure you are pointing to the folder containing the license in vivado license manager (do not use the default .Xilinx folder, I usually use C:/Licenses).

This is all I can say


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
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Registered: ‎11-09-2015

Re: Porting DisplayPort to custom board can't generate bitstream

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Hi @efpkopin 

Kindly note that the logicore Displayport IP 7.0 is a discontinued IP which is not supported anymore. You might want to move to the Displayport Subsystem which uses the same license and is an improved version.

With that said, the error you are pointing at is not giving enough detail. I invite you to read the full vivado log and all critical warnings and warnings to get more details.

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Adventurer
Adventurer
234 Views
Registered: ‎01-20-2017

Re: Porting DisplayPort to custom board can't generate bitstream

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@florentw, thank you for your response.  I understand the unsupported nature of the IP - but it is working acceptably on our KC-705 project so I'm hopeful I can get it working on this new board design without the necessity of a license upgrade purchase.

I did take a closer look at the log files and none of the warnings posted seem to provide a clue (they are related to timing closure issues and other general issues).  In fact, comparing the Implementation log for the KC705 projects that does build and this new project, the logs are quite similar.  It's just that at the end, this project reports:

INFO: [Project 1-604] Checkpoint was created with Vivado v2016.1 (64-bit) build 1538259
open_checkpoint: Time (s): cpu = 00:01:14 ; elapsed = 00:01:11 . Memory (MB): peak = 1480.777 ; gain = 1274.266
Attempting to get a license for feature 'Implementation' and/or device 'xc7k160t'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7k160t'
INFO: [Common 17-83] Releasing license: Implementation
ERROR: [Common 17-69] Command failed: This design contains one or more cells for which bitstream generation is not permitted:
design_1_i/displayport_0/inst/support_inst/core_top_inst/dport_link_inst (displayport_v7_0_0_rxlink_top)

That's it.  I can't determine what could be causing this failure.  Is there some other more detailed log I can review to figure out what is going wrong?

 

 

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Moderator
Moderator
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Registered: ‎11-09-2015

Re: Porting DisplayPort to custom board can't generate bitstream

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HI @efpkopin 

According to the following topic, this still seems to be a licensing issue:

https://forums.xilinx.com/t5/Implementation/ERROR-Common-17-69-Command-failed-This-design-contains-one-or/td-p/568318

You might want to have a look at the following AR:

https://www.xilinx.com/support/answers/58758.html


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Adventurer
Adventurer
210 Views
Registered: ‎01-20-2017

Re: Porting DisplayPort to custom board can't generate bitstream

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@florent, thanks again.  My project is block-diagram based.  I am trying to follow the steps suggested in https://www.xilinx.com/support/answers/58758.html   But when I go to the IP sources tab in the Project Manager Window and right click on the DisplayPort IP, the option to 'Reset Output Products' is grayed out.  Presumably, I need to initiate a similar 'reset' within the block diagram environment.  However, right clicking on that block in the design does not show any obvious commands that would reset or regenerate the IP.  If I double click on the block, the customization dialog opens up, but there does not seem to be an obvious way there to 'reset' this IP.

How can I regenerate this in a block diagram environment?

The other thing I'll say is that the answer record suggests the problem was that the IP core was generated with an evaluation license and that we changed up our license to a full one at a later date.  However, we have had the same full license the whole time.  I 'created' this DisplayPort IP in my block diagram by pulling it directly from the IP Catalog.  Granted, I did make sure the settings within the DP customization dialog matched those of our KC-705 project.  But I don't understand how this IP (which comes directly from the catalog) could get some improper license information associated with it.

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Moderator
Moderator
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Registered: ‎11-09-2015

Re: Porting DisplayPort to custom board can't generate bitstream

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HI @efpkopin 

You should be able to right-click on the block design in the sources window and click reset block design.

Then I am not sure why the tool would pick up a wrong license but it might happen. You might want to make sure you are pointing to the folder containing the license in vivado license manager (do not use the default .Xilinx folder, I usually use C:/Licenses).

This is all I can say


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Adventurer
Adventurer
169 Views
Registered: ‎01-20-2017

Re: Porting DisplayPort to custom board can't generate bitstream

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@florentw This worked - thank you! For the record, with the block diagram open, in the Sources & Hierarchy tabs (in Vivado 2016.1), I right clicked on the .bd file and selected 'Reset Output Products'. After that I was able to re-synthesize, implement and generate bitstream.

Thanks again