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Participant srdjan.opacic
Participant
514 Views
Registered: ‎08-21-2017

Preemphasis control on DisplayPort RX Subsystem

Hi,

I'm trying to control voltage preemphasis using DisplayPort RX subsystem IP. I'm modifying the content of the MIN_VOLTAGE_SWING register.

Default settings of the register limit maximum preemphasis to 1 (set by value SET_PREEMP, [13:12]), but my customer noticed DP subsystem IP requesting preemphasis to 2 using AUX channel sniffer. Am I misinterpreting the behavior of register MIN_VOLTAGE_SWING?

I'm attaching AUX log for reference

Thanks

Srdjan

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6 Replies
Participant srdjan.opacic
Participant
506 Views
Registered: ‎08-21-2017

Re: Preemphasis control on DisplayPort RX Subsystem

One additional question: documentation for this register specifies the following for PREEMP setting modes:

[11:10] - 11 - pick values from PREEMP_TABLE

SW on the other hand specifies the following:

#define XDP_RX_MIN_VOLTAGE_SWING_CE_OPT_PE_INC \
0x0 /**< Increment pre-emphasis
adjust request every
training iteration until
maximum level, SET_PE,
is reached. */
#define XDP_RX_MIN_VOLTAGE_SWING_CE_OPT_PE_HOLD \
0x1 /**< Hold adjust request to
SET_PE. */
#define XDP_RX_MIN_VOLTAGE_SWING_CE_OPT_PE_TABLE \
0x2 /**< Pick pre-emphasis values
from PE_TABLE. */
#define XDP_RX_MIN_VOLTAGE_SWING_CE_OPT_VS_NA \
0x3 /**< Not applicable. */

 

So driver specifies 0x3 as not applicable. Which of the two is correct?

Thanks

Srdjan

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Moderator
Moderator
496 Views
Registered: ‎11-09-2015

Re: Preemphasis control on DisplayPort RX Subsystem

Hi @srdjan.opacic ,

You understanding about the chaneel equalization seems correct according to me. Let me check with development and get back to you.

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
160 Views
Registered: ‎11-09-2015

Re: Preemphasis control on DisplayPort RX Subsystem

Hi @srdjan.opacic ,

1. Thank you for reporting the mismatch between the documentation and the driver. EDIT: The driver is incorrect. I have reported this to development.

2. For the limit of preemphasis, the VSWING settings is acting only during VSWING and Channel Equalization. What we see in the AUX log is during TP2 which is not impacted by this.

Do you see any issue related to the pre-emphasis value?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Participant srdjan.opacic
Participant
94 Views
Registered: ‎08-21-2017

Re: Preemphasis control on DisplayPort RX Subsystem

Hi @florentw ,

 

Sorry for the late reply, I missed the notification that you made a reply :(.

I'm waiting for my custmoer to retest, using documentation settings (instead of driver). maybe that is the main problem.

Side issue - I have an inquiry can I set different Voltage Swing and Preemphasis during different phases of training, i.e. during Clock Recovery adn during Equlization. is this something possible using the Xilinx IP? I'm trying to get a feel of the level of control we have on the whole training process.

Thanks

Srdjan

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Moderator
Moderator
69 Views
Registered: ‎11-09-2015

Re: Preemphasis control on DisplayPort RX Subsystem

Hi @srdjan.opacic ,

No, you cannot set different Voltage Swing and Preemphasis during different phases of training


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
40 Views
Registered: ‎11-09-2015

Re: Preemphasis control on DisplayPort RX Subsystem

HI @srdjan.opacic ,

Is everything clear for you on this topic?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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