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Participant rogerwilson
Participant
1,771 Views
Registered: ‎11-12-2008

SMPTE SD/HD/3G-SDI

Hi All,

 

Firstly I'd like to echo the complaints about this IP which were expressed in a comment of over a year ago (see link).

 

https://forums.xilinx.com/t5/DSP-and-Video/SMPTE-SD-HD-3G-SDI-Tx-only/m-p/658165#M14910

 

For something that's supposed to make life easier and allow product to market sooner, this IP needs to be re-visited and modified. It's in effect useless when first put into a design and can only be made to operate by means of a lot of hacking. I'm referring to the XAPP592 code (as in my case I'm using a Kintex device) which seems required to get even the most basic functionality to operate.

 

As to my more technical question: My application only requires support for the 1.48 and 2.97Gbps bit rates i.e. not the /1.001 rates or SD-SDI. Therefore, would some learned person be kind enough to tell me what simplifications can be made to the XAPP592 support code please? Only a single 148.5MHz reference is required, presumably via the QPLL and therefore no clock switching but what about the rest of the code please? I know I'll have to delve into the code at some point but as a VHDL user (and the XAPP 592 code's in Verilog), some pointers before I start would be useful.

 

Thanks,

Rog.

 

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