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Explorer
Explorer
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Registered: ‎03-17-2011

SMPTE UHD SDI Rx subsystem IP: pixel ordering

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hi,

 

I'm using the SMPTE UHD SDI Rx subsystem IP. I started with a VCU TRD.

I'm wondering about the VIDEO_OUT AXI Stream interface. Tdata is 64 bits wide.

The IP gives 2 pixels / clock with 10 bits per components in YUV 4:2:2. Therefore, only 40 bits are useful in tdata padded with 24 bits. Then, this module is connected to a AXIS subset converter with a tdata remap set to: tdata[39:32],tdata[29:22],tdata[39:32],tdata[29:22],tdata[19:12],tdata[9:2].

It seems to be 3 pixels/clk... weird. Can I assume that only tdata[39:32],tdata[29:22],tdata[19:12],tdata[9:2] is relevant? where tdata[29:22] and tdata[9:2] are Y?

I know I get 8 bits per pixels out this converter.

Thanks.

--Sebastien
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Moderator
Moderator
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Registered: ‎11-09-2015

Re: SMPTE UHD SDI Rx subsystem IP: pixel ordering

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Hi @sebo 

Is you video mixer input 8-bits or 10-bits? Note that you UHD-SDI is 10-bits so if you are going to 8bit you need to make sure you are taking the MSB of each component.

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
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Registered: ‎11-09-2015

Re: SMPTE UHD SDI Rx subsystem IP: pixel ordering

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HI @sebo 

Yes the UHD-SDI RX IP in AXI4-Stream interface should follow the UG934, so yes you should havev data only on tdata[39:32],tdata[29:22],tdata[19:12],tdata[9:2].

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
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Registered: ‎03-17-2011

Re: SMPTE UHD SDI Rx subsystem IP: pixel ordering

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Thanks @florentw 

Yes indeed. I came to that conclusion as well.The video stream goes to the Video mixer ip.

Now lets say I want to switch to 4 pixels / clock. I have used a AXI Stream Data width converter in between. But my video is not good on screen. I guess that I need to reorganize the pixels between the Dwidth converter and the mixer. But how? Is it still alogned with the UG934?

 

 

--Sebastien
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Moderator
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174 Views
Registered: ‎11-09-2015

Re: SMPTE UHD SDI Rx subsystem IP: pixel ordering

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Hi @sebo 

Is you video mixer input 8-bits or 10-bits? Note that you UHD-SDI is 10-bits so if you are going to 8bit you need to make sure you are taking the MSB of each component.

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Explorer
Explorer
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Registered: ‎03-17-2011

Re: SMPTE UHD SDI Rx subsystem IP: pixel ordering

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hi @florentw 

Yes. That probably something like that.

--Sebastien
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