05-10-2018 02:41 AM
I've designed the TX only SDI design for ZCU102 from ZCU106 12G-SDI pass through example design.
Modified the example design as required for TX only design.
The serial transceiver reference clock is given from the FMC card, which has a 148.5 Mhz clk oscillator (default clk out).
I am not able to get the txoutclk from the GT core. I've double verified my reference clk and transceiver constraints on the .xdc file.
05-14-2018 10:39 AM
How are you checking the TXOUTCLOCK?
Could you make sure the GT is not held in reset?
Did you check the configuration (MGTREFCLK selection?).
05-17-2018 04:15 AM
05-17-2018 07:34 AM
05-23-2018 06:28 PM
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05-23-2018 09:57 PM
06-07-2018 12:07 AM