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Observer ramonal
Observer
5,643 Views
Registered: ‎06-16-2009

System generator problem: simulation shows different behavior than hardware

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Hi.

 

I just tried to generate a code for an analog to digital converter. In the attachment you can see the simple block diagram for the clock generation. The scope shows the expected clock signal. But if I measure the signal at the output pin on the FPGA board I don't get the clock signal. The measured pin signal is the inverted signal of the Register. So I can see that the signal is inverted ones but it isn't feed back into register.

 

I appreciate any suggestion.

 

Thanks,

Ramona

 

 

1 Solution

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Adventurer
Adventurer
6,286 Views
Registered: ‎08-20-2007

Re: System generator problem: simulation shows different behavior than hardware

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You have undefined clock pin location in System Generator dialog. You should define it. Also in gateway out block IOB pad locations must be defined.

 

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Adventurer
Adventurer
6,287 Views
Registered: ‎08-20-2007

Re: System generator problem: simulation shows different behavior than hardware

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You have undefined clock pin location in System Generator dialog. You should define it. Also in gateway out block IOB pad locations must be defined.

 

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Observer ramonal
Observer
5,576 Views
Registered: ‎06-16-2009

Re: System generator problem: simulation shows different behavior than hardware

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Hey,

 

Thanks a lot for your answer. The IOB pin location is defined I could also measure a voltage change at the output pin. But I can't measure a clock signal just one voltage change therefore I want to ask how I have to assign the clock pin location. I tried the System clocl location and assigned {'B15'} but nothing changed.

 

Thanks Ramona

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Adventurer
Adventurer
5,568 Views
Registered: ‎08-20-2007

Re: System generator problem: simulation shows different behavior than hardware

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How you got {'B15'}? The clock pin location is not the pin, where you want to measure your output, but it is input for your FPGA design from external high frequency oscillator. You should open schematic of your board and check to which pin oscillator is connected. Then type this pin as clock source.

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Observer ramonal
Observer
5,557 Views
Registered: ‎06-16-2009

Re: System generator problem: simulation shows different behavior than hardware

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Hi Syoma,

 

Thanks again for your reply but you got me wrong. B15 is my pin location for the FPGA and it works now. I had some different problems why I couldn't measure the clock. I connected to the output pin W1 with a pin description IO_L1N_8. I read somewhere in a forum that I only can connect a clock to a pin IO_LxP_x. Is this right? And if it is right I would appreciate any idea to connect a clock to Pin W1 because I can't change the pin it is connected on the Virtex 4 development kit.

 

Thanks, Ramona

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Adventurer
Adventurer
5,547 Views
Registered: ‎08-20-2007

Re: System generator problem: simulation shows different behavior than hardware

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Once again. What type of Virtex 4 development kit you use?

 

 

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Observer ramonal
Observer
5,511 Views
Registered: ‎06-16-2009

Re: System generator problem: simulation shows different behavior than hardware

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Hey Syoma,

 

Thanks again for answering. I am working with the Avnet Memec Virtex-4 FX 12 LC Development Board. On the P160 connector I attached a digital to analog conversion board. The clocks I try to generate are for the analog digital conversion. I connected the generated clock to all necessary pins but I can measure the clock signal just at one pin. If you have an idea I would be very thankful.

 

Thanks,

Ramona

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