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Explorer
Explorer
1,125 Views
Registered: ‎09-25-2017

VDMA 24bit AXI-Stream gives strange S2MM WSTRB

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Hi,

  Vivado 2017.1

  AXI_VDMA 6.3  -> AXI Smartconnect -> PS7 HP AXI

 

  I process the 16bit AXI-S stream to  produce a 24bit stream at the same clock.  All 24bit output are active.  But VDMA S2MM WSTRB seems to qualify only lower 8bit data out of 24bit when writing to AXI Smartconnect, as shown in second screen cap.

 

 

  

bd.PNG

 

 

So the AXIS cap from ILA looks like this:

axis 1st data.PNG

 

But the S2MM WSTRB is not "11111111" as expected.

 s2mm write.PNG

I need to write all 3 bytes of 24bit.  Pls help.

 

Regards,

 

Neo

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Explorer
Explorer
1,395 Views
Registered: ‎09-25-2017

Re: VDMA 24bit AXI-Stream gives strange S2MM WSTRB

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Hi all,

  Found the problem. 

 

  AXI-S TKEEP for 16bit is only 2 bit wide.  I connected it directly to AXI-S 24bit TKEEP which is 3 bit wide.

  So essentially 24bit AXI-S was getting 3'b011 input all the time.   When Smartconnect start receiving WSTRB like 8'b01001001, it cannot handle the input and did not start writing to AXI-HP at all.  

 

  So I duplicated TKEEP[0] to TKEEP[2] to get 3'b111, and WSTRB becomes 8'b11111111 which is correct.

 

Neo

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Moderator
Moderator
1,093 Views
Registered: ‎11-09-2015

Re: VDMA 24bit AXI-Stream gives strange S2MM WSTRB

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Hi wtneo@leica,

 

Do you have the ILA capture for the AXI_MM interfaces from the VDMA. From your screenshot it could be coming from the smartconnect.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Explorer
Explorer
1,396 Views
Registered: ‎09-25-2017

Re: VDMA 24bit AXI-Stream gives strange S2MM WSTRB

Jump to solution

Hi all,

  Found the problem. 

 

  AXI-S TKEEP for 16bit is only 2 bit wide.  I connected it directly to AXI-S 24bit TKEEP which is 3 bit wide.

  So essentially 24bit AXI-S was getting 3'b011 input all the time.   When Smartconnect start receiving WSTRB like 8'b01001001, it cannot handle the input and did not start writing to AXI-HP at all.  

 

  So I duplicated TKEEP[0] to TKEEP[2] to get 3'b111, and WSTRB becomes 8'b11111111 which is correct.

 

Neo

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Moderator
Moderator
1,083 Views
Registered: ‎11-09-2015

Re: VDMA 24bit AXI-Stream gives strange S2MM WSTRB

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Hi wtneo@leica,

 

Thank you for updating the topic.

 

As the issue is solved, could you kindly close the topic by marking your last reply as accepted solution (you should have an "accept as solution" button). This might help other memvbers.

 

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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