08-05-2019 12:35 PM
Hello. I am have a design that uses a ZYNQ SOC to take MIPI PHY camera data and output it to an ADV7511 HDMI driver. I am using Video In -> AXI4S which then streams into VDMA block. The VDMA then outputs the frame to a AXI4S to Video Out IP block. There is some processing that needs to be done on the Camera data input initially that makes this a little more complicated then it sounds but it is working as described above.
This leads me to my question: I now need to make changes to individual and groups of pixels to the video frame once it is written to the Frame Buffer. I only see how to use VDMA IP to write whole entire screens because it is streamed with vsync, hsync and clocking signals. But I need to do regional partial screen updates to a frame in memory. Is this possible and if so what would the right approach be? Would I use the VDMA as read only and have it constantly send out the data to Video Out to AXIS which would drive my HDMI output (to the ADV7511) and then update portions of the VDMA frame buffer using a DMA IP block and somehow only writing to certain overlapping memory locations?
I have searched the forum and not found a similar example. If anyone can point me in the right direction I would appreciate any help. Thank you. My current vivado block diagram architecture looks like the following image. Again this is working but now I need to partially update the Frame Buffer and I need some help figuring out the best IP approach for this.
08-05-2019 02:30 PM
To add a little more detail, what I am hoping to do is directly write to the frame buffer from the PL. Not from the PS. I want to be able to write to arbitrary locations in the frame buffer all the while the VDMA read channel will be going out of the design to a hdmi monitor. If I'm using triple frame buffers I assume I can do this but I don't know which IP or approach might work best for this concept. Thanks again. Any help is appreciate.
08-06-2019 11:16 AM
To add some further clarification. I need to write partial frame data based off of an address not just a full screen stream of data. For example in a 1920x1080 image I may need to update the first 100 rows of an image and leave the remaining 1820 rows unchanged. Or I may need to update rows 500 to 1000 and leave the other rows unchanged.
I think I need to combine the VDMA read channel (for constant outputting of hdmi data) with a DMA IP block for the write channel (to write the regional image updates) overlapping the same memory space but I can't see how to transmit the start address from the PL logic. I need to do it in the PL due to timing as the updates will be coming quickly.
Any direction would be appreciated as I'm not confident that this is the correct approach. Thanks.
08-07-2019 03:37 AM
I was trying to find the best solution using multiple VDMAs, and each time I was facing some complexity. Then I thought about the following solution (which might not be the best but it sounded the easiest when I start replying):
You split your full frame using an AXI4-Stream broadcaster then you have to pipeline:
Then you merge both streams back using the video mixer. This is what I think of:
Hope that helps,
08-08-2019 08:58 AM
Thanks for the reply, Florent. I'm attempting something similar to what you recommend now. For others with similar needs I have found a really good resource for zynq and in this particular case creating custom axi master interface which I may need to do to drive the partial pixel data to the memory mapped axi bus:
08-09-2019 01:00 AM - edited 08-09-2019 01:02 AM
Great. Can you update quickly the community once you have your final solution (just a quick overview). It might be helpful for users trying to do a similar design
What I was thinking for the custom IP is just to do a kind of video crop directly on the stream interfaCE as I have done in my Video Beginner Series 17: Create a Video Crop IP using HLS (part 1). Then if you need to move the stream to memory, you can use a VDMA
08-09-2019 08:20 AM
Hello Florent, I will update this thread when I come up with something. I had seen your example of a video cropper but for my design that won't be helpful. I hadn't described the design requirements in enough detail. I am not always getting full frame updates that I need to modify. I sometimes get partial screen updates from the camera video stream input. This video input device sometimes only updates a portion of the screen that has changed. Its not actually a camera but I was using that example for simplicity. So it isn't a "raster" output device but a device that outputs only changes to the video based on a start address and stop address.
In that case I can't use the crop function as I have to maybe manually update the video frame buffer (probably by using the video mixer that you pointed me to) in a memory mapped way. Lets say I have a screen that is 1920x1080 and the video input device only changes the top portion of the screen let say the first 100 rows only. That is the scenario I am looking to design for. I still haven't finalized the architecture as I'm doing some more research. Thanks again for your block diagram. It was helpful. If this further description brings anything else to mind I would be eager to hear it.
08-19-2019 01:42 AM
The video crop function is just a quick example of how you can split the image. It can be modified to "copy" part of the input on which you need to do the processing (and then display the output using the video mixer).
Please share with the community when you got your final solution
09-23-2019 01:49 AM
I am just checkin in on this. Were you able to get to a solution on this?
09-23-2019 01:54 PM
My data is coming in as partial screen updates (blocks or slices of the screen) so I don't have the full image to crop from. Instead I need to build up the full image in pieces. So I need to somehow write the partial screens into the full frame buffer. I may be able to do it in a manner that you mention using the video mixer you mention and feeding a dummy full screen to mix it with or the image currently in memory to mix it with.
10-01-2019 02:30 AM
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