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Adventurer
Adventurer
957 Views
Registered: ‎04-05-2018

VDMA and Memory

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Hello!

Help me please.

https://forums.xilinx.com/t5/Video/VDMA-amp-write-to-memory/m-p/845703#M19507 - in this addres described my project. But i have some problem. When vdma write to memory it makes large gaps between the first row and the second (u can see on image)

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1 Solution

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Voyager
Voyager
1,354 Views
Registered: ‎03-28-2016

Re: VDMA and Memory

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No much information to go on but I would suspect that you need to check the size of the "Stride" that is programmed in the VDMA. 

 

There are 4 main values to program for the VDMA :

  • Beginning Address(es) - The address where the first pixel will be stored for each buffer
  • Vertical Size - The number of vertical lines in the buffers (measured in the # of lines)
  • Horizontal Size - The number of pixels in each line (measured in bytes)
  • Horizontal Stride - The number of bytes from the start of one line to the start of the next line (measured in bytes).  Stride must always be >= to Horizontal Size.

When the stride is the same size as Hsize, the second line is next to the last pixel of line one.  When the stride is larger than Hsize, there will be a gap between the end of line one and the start of line 2.  That distance will be (Stride - Hsize) measured in bytes.

 

Also, you may already know this but it is worth repeating.  Hsize must be the last action in a programming sequence.  Values written to the VDMA registers are held in shadow registers until a value is written to the Hsize register.  Once the Hsize register is written, all of the shadow registers are accepted and used starting on the next frame.  Any values written after Hsize, will be held in the shadow registers until the next time Hsize is written.

 

Hope this helps.

Ted Booth - Tech. Lead FPGA Design Engineer
www.designlinxhs.com
3 Replies
Voyager
Voyager
1,355 Views
Registered: ‎03-28-2016

Re: VDMA and Memory

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No much information to go on but I would suspect that you need to check the size of the "Stride" that is programmed in the VDMA. 

 

There are 4 main values to program for the VDMA :

  • Beginning Address(es) - The address where the first pixel will be stored for each buffer
  • Vertical Size - The number of vertical lines in the buffers (measured in the # of lines)
  • Horizontal Size - The number of pixels in each line (measured in bytes)
  • Horizontal Stride - The number of bytes from the start of one line to the start of the next line (measured in bytes).  Stride must always be >= to Horizontal Size.

When the stride is the same size as Hsize, the second line is next to the last pixel of line one.  When the stride is larger than Hsize, there will be a gap between the end of line one and the start of line 2.  That distance will be (Stride - Hsize) measured in bytes.

 

Also, you may already know this but it is worth repeating.  Hsize must be the last action in a programming sequence.  Values written to the VDMA registers are held in shadow registers until a value is written to the Hsize register.  Once the Hsize register is written, all of the shadow registers are accepted and used starting on the next frame.  Any values written after Hsize, will be held in the shadow registers until the next time Hsize is written.

 

Hope this helps.

Ted Booth - Tech. Lead FPGA Design Engineer
www.designlinxhs.com
Xilinx Employee
Xilinx Employee
925 Views
Registered: ‎08-02-2011

Re: VDMA and Memory

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Great explanation; I agree completely with Ted.

 

Small correction:

Also, you may already know this but it is worth repeating.  Hsize must be the last action in a
programming sequence. Values written to the VDMA registers are held in shadow registers until a value
is written to the Hsize register. Once the Hsize register is written, all of the shadow registers are
accepted and used starting on the next frame. Any values written after Hsize, will be held in the
shadow registers until the next time Hsize is written.

The above description is correct for VSIZE register, not HSIZE.

www.xilinx.com
Adventurer
Adventurer
867 Views
Registered: ‎04-05-2018

Re: VDMA and Memory

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Hi, @tedbooth
Thanks for help!
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