UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Explorer
Explorer
535 Views
Registered: ‎07-18-2011

VDMA - single AXI4 interface performance difference?

Jump to solution

I noticed an option under the Advanced tab to "Enable Single AXI4 Data Interface". that creates a single M_AXI interface instead of a separate MM2S and S2MM interface when using both a write and read channel.

I assume this is to reduce resource usage, but is there any performance difference when using this combined interface, compared to separate MM2S and S2MM interfaces?

Update: I tried enabling single AXI interface on two VDMAs in a nearly full Artix 100, and I got all kinds of errors saying the resource utilization was exceeded.  It fits with room to spare using the separate interfaces on both VDMAs, so I guess my assumption that the single interface saves resources was incorrect.  If so, what is it used for?  The VDMA user's guide does not mention this option.

 

Tags (2)
0 Kudos
1 Solution

Accepted Solutions
Highlighted
Moderator
Moderator
459 Views
Registered: ‎10-04-2017

Re: VDMA - single AXI4 interface performance difference?

Jump to solution

Hi @reaiken,

 

Hovering over the option shows:

 

2019-01-03 13_50_00-xcovnc102_24 (xcovnc102_24 (samk)) - VNC Viewer.png

It looks like this was added to make interfacing to the core easier and not necessarily for saving on resources.

 

Regards,

Sam

 

Don't forget to reply, kudo, and accept as solution.

Xilinx Video Design Hub
2 Replies
Highlighted
Moderator
Moderator
460 Views
Registered: ‎10-04-2017

Re: VDMA - single AXI4 interface performance difference?

Jump to solution

Hi @reaiken,

 

Hovering over the option shows:

 

2019-01-03 13_50_00-xcovnc102_24 (xcovnc102_24 (samk)) - VNC Viewer.png

It looks like this was added to make interfacing to the core easier and not necessarily for saving on resources.

 

Regards,

Sam

 

Don't forget to reply, kudo, and accept as solution.

Xilinx Video Design Hub
Moderator
Moderator
398 Views
Registered: ‎11-09-2015

Re: VDMA - single AXI4 interface performance difference?

Jump to solution

HI @reaiken,

Is everything clear for you on this topic?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
0 Kudos