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Adventurer
Adventurer
1,477 Views
Registered: ‎08-16-2017

VDMA vs Video FrameBuffer R/W IP Cores

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Going through the documentation of both IP core, it seems these two cores functionality is overlapping. In our video application we wish to just buffer and push the video into DDR ram. Is it fair to assume that FrameBuffer Write is all we need? When do we need a full VDMA core?

 

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Xilinx Employee
Xilinx Employee
1,730 Views
Registered: ‎08-02-2011

Re: VDMA vs Video FrameBuffer R/W IP Cores

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VDMA usage with MM2S disabled would be fine.

The Framebuffer read/write were written for VCU use cases in ZU+ devices because it expects specific format of the video data in memory.
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Moderator
Moderator
1,412 Views
Registered: ‎11-09-2015

Re: VDMA vs Video FrameBuffer R/W IP Cores

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Hi @ziladdev,

Yes both core have the samd functionality. You could do write only with the VDMA also.
However I recommend to use the frame buffer as it seems to slowly replace the VDMA (better for Linux, better performance...)

Regards

Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
1,371 Views
Registered: ‎11-09-2015

Re: VDMA vs Video FrameBuffer R/W IP Cores

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Hi @ziladdev,

 

If everything is clear for you, please kindly close the topic by marking a reply as accepted solution.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Adventurer
Adventurer
1,350 Views
Registered: ‎08-16-2017

Re: VDMA vs Video FrameBuffer R/W IP Cores

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Thanks for the reply!

I have started using Video Frame Buffer instead of the VDMA, besides being a bit awkward. For instance, I had to pad the stream since for YUV422 it still expects 3x(8bits) components while my Video In to AXI4 spits outs 2x(8bits), this was clearly documented so no big deal.

 

One thing I noticed is that in terms of utilization it is using 2x DSP slices while VDMA uses none...I am wondering why would one need this for this function? I see the HLS logo on the actual block design and I was wondering if one had access to the (C/C++?) source code of the IP core ... (perhaps not!).

 

Anyways my design is quite heavy on the use of DSPs and It may happen that I will revert back to using VDMA...

 

Any views on this?

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Xilinx Employee
Xilinx Employee
1,731 Views
Registered: ‎08-02-2011

Re: VDMA vs Video FrameBuffer R/W IP Cores

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VDMA usage with MM2S disabled would be fine.

The Framebuffer read/write were written for VCU use cases in ZU+ devices because it expects specific format of the video data in memory.
www.xilinx.com