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Explorer
Explorer
1,661 Views
Registered: ‎05-30-2017

VPSS 2.0 doesn't syntetize

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Hello I'm working with Vivado 2018.2. I got an evaluation licence for Video processing subsystem 2.0 and indeed Vivado says "Hardware evaluation licence available" opening the GUI of the IP. I created a test project for the IP in the directory c:\VPSS_test. When i syntetize the design Vivado says me that can't find some module in VPSS IP. These are the error messages:

 

[Synth 8-439] module 'bd_96e7_hsc_0_v_hscaler' not found ["c:/VPSS_test/OSDTest.srcs/sources_1/bd/OSDTest/ip/OSDTest_v_proc_ss_1_0/bd_0/ip/ip_3/synth/bd_96e7_hsc_0.v":185]

 

[Synth 8-439] module 'bd_96e7_hcr_0_v_hcresampler' not found ["c:/VPSS_test/OSDTest.srcs/sources_1/bd/OSDTest/ip/OSDTest_v_proc_ss_1_0/bd_0/ip/ip_23/synth/bd_96e7_hcr_0.v":185]

 

[Synth 8-439] module 'bd_96e7_ltr_0_v_letterbox' not found ["c:/VPSS_test/OSDTest.srcs/sources_1/bd/OSDTest/ip/OSDTest_v_proc_ss_1_0/bd_0/ip/ip_5/synth/bd_96e7_ltr_0.v":185]

 

[Synth 8-439] module 'bd_96e7_dint_0_v_deinterlacer' not found ["c:/VPSS_test/OSDTest.srcs/sources_1/bd/OSDTest/ip/OSDTest_v_proc_ss_1_0/bd_0/ip/ip_17/synth/bd_96e7_dint_0.v":308]

 

[Synth 8-439] module 'bd_96e7_vsc_0_v_vscaler' not found ["c:/VPSS_test/OSDTest.srcs/sources_1/bd/OSDTest/ip/OSDTest_v_proc_ss_1_0/bd_0/ip/ip_2/synth/bd_96e7_vsc_0.v":185]

 

I reseted output products a lot of time and closed and reopened Vivado but nothing changes. Could someone help me? Thank you.

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Moderator
Moderator
1,539 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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HI @pierlum,

 

Could you check if you have a folder with the name containing hsc in the .runs folder. If yes do you have a vivado_hls.log file inside? Could you share it?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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33 Replies
Moderator
Moderator
1,578 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

Could you try to generate the example design for the VPSS as mentioned in the chapter 5 of PG231 starting from a new vivado project and try to run synthesis and let me know if synthesis can complete.

 

Thanks,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,575 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

Thanks for the reply!

I generated example design of VPSS. At the end of generation Vivado says: There were 10 errors when executing Tcl commands. Please see Tcl console for more details.

 

The errors are

 

ERROR: [BD 41-758] The following clock pins are not connected to a valid clock source:
/v_proc_ss_0/aclk_axi_mm
/clock_and_reset/clk_wiz_0/clk_in1
/memory_ss/mig/CLK_REF

ERROR: [BD 41-1031] Hdl Generation failed for the IP Integrator design c:/exampledes/v_proc_ss_0_ex/v_proc_ss_0_ex.srcs/sources_1/bd/vps_ex/vps_ex.bd
ERROR: [open_example_project] Open Example Project failed: Error encountered while sourcing custom IP example design script.
ERROR: [Common 17-39] 'make_wrapper' failed due to earlier errors.

while executing
"make_wrapper -files [get_files ${design_name}.bd] -top"
(file "c:/VPSS_test/.Xil/v_proc_ss_0/tmp_v_proc_ss_0.srcs/sources_1/ip/v_proc_ss_0/v_proc_ss_0_exdes.tcl" line 13)
invoked from within
"source [file join $srcIpDir v_proc_ss_0_exdes.tcl]"
ERROR: see log file for details.
while executing
"error "ERROR: see log file for details.""
invoked from within
"if {[catch {source [file join $srcIpDir v_proc_ss_0_exdes.tcl]} errMsg]} {
puts "ERROR: \[open_example_project\] Open Example Project failed: Error ..."
(file "c:/VPSS_test/.Xil/v_proc_ss_0/tmp_v_proc_ss_0.srcs/sources_1/ip/v_proc_ss_0/v_proc_ss_0_ex.tcl" line 55)

 

I generated the example design in folder C:/exampledes so the cause I don't think could be the length of the path

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Moderator
Moderator
1,563 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

According to @kshimizu in this topic, he was able to reproduce the same issue and it was a path length issue. Could you try to generate the project in C:\X?

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,556 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw thanks for the help!

 

I generated the example design in "C:/x" and now the error are 8 and not 10.

I the log it says that the board I selected was not in the board supported for example design. I selected now ZCU106 as board and now example design is generated correctly.

 

SO maybe with short path i solved 2 error and the other are related to incorrect board. Now I'm synthesizing my test project for VPSS in C:\w

 

Edited: Also in this way Vivado says that can't find some VPSS module.

 

I also created another project called "a" in folder "C:/k" but also in this way it doesn't work.

 

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Moderator
Moderator
1,522 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

I tried different configurations on my win10 machine and I was not able to make the project fail:

  • I tried without VPSS license
  • with the VPSS license in %APPDATA%
  • with a longer folder name
  • with different boards

 

Could you give me some detail on your configuration that are failing?

  • what is your OS version (win7, win10)
  • what board did you try?
  • in which folder?

 

Could you try to launch vivado from command line and see if it also fails?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,520 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

 

This is my last failing configuration:

 

  • Windows 10
  • xc7a200tfbg484-2 (active)
  • C:/n

 

If can be usefull I can upload my design. Launch from command line means from Vivado HLS 2018.2 Commnad Prompt?

 

Thank you very much for the help.

 

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Explorer
Explorer
1,502 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

 

I attached my failing project. (Vivado 2018.2) Thanks for the help.

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Moderator
Moderator
1,425 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

I tried to synthesize your project and I didn't had issues while I am also using an evaluation license...

Could you generate the report environment (in tcl console: report_environment -file <path>\report.txt) and attached it to this topic?

Also as mentioned try to launch vivado by command line (windows not vivado tcl command line):
1. Opem windows command prompt (search for cmd)
2. cd to the directory C:\n
3. enter "c:\Xilinx\Vivado\2018.2\.settings64-Vivado.bat"
4. enter "vivado"


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,420 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

 

I launched Vivado from command prompt but it's the same. I attached report.txt.

Thank you very much for the help.

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Moderator
Moderator
1,364 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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HI @pierlum,

 

Could you try to place the VPSS license in a different folder. Currently it is in:

C:\Users\Admin\AppData\Roaming\XilinxLicense\Xilinx_VPSS_3nd.lic

 

Could you try in C:\Licences\ and point to this location in vivado license manager?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,359 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

 

I modified licence directory but it's the same. I attached new report. Thank you.

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Moderator
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Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

I have one more idea: My computer seams to hang if I just run synthesis but complete successfully if I fist generate the BD output product and then run synthesis.

 

Could you try it?

  • Right click on the block design in the Sources window -> Generate output products
  • Wait for the output products to be generated
  • Run synthesis

Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,331 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

 

Thanks for the help. Doing in this way Vivado fails during the generation BD output.
 

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Explorer
Explorer
1,244 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Has anyone ever happened to the same thing? Thank you.

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Moderator
Moderator
1,238 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

Could you share your license files for vivado AND for the VPSS?

 

Also what is release/update of your Win 10 OS?

 

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,208 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

 

thanks for the reply. My release of WIndows 10 is Windows 10 Enterprise 2016 LTSB Build 14393. I attached two licences. Xilinx_VPSS_3nd.lic is the VPSS licence and Xilinx.lic should be Vivado licence. Thank you.

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Moderator
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Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

A PM was sent to you related to your license. Please fix this.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,113 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Thanks @florentw I saw the PM. I have fixed the licence problem but however VPSS doesn't work. Thanks for the support!

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Moderator
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1,107 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

Could you give more detail on "VPSS doesn't work". Do you have the license for the VPSS? Is it showing correctly in VLM?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,164 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

Thanks for the help. I attached VLM screenshot showing VPSS licence and the VPSS licence.

Thank you.

VPSS_VLM.jpg
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Moderator
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1,159 Views
Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

Could you give more detail on "VPSS doesn't work"? Is it still the same error as the beginning?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
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Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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HI @pierlum,

 

Do you have any updates on this? Could you share what is the error you get?

Did you make sure to regenerate the output products after the change in the license?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,134 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

thanks for the help.

I resetted and than I regenerated output products. I attached a screenshot with the errors. Thank you.

VPSS_error.jpg
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Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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Hi @pierlum,

 

I believe you also need the TPG license which can be generate for free. Can you try?

 

Thanks,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,125 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

thanks for the help.

I followed your advice but the error is the same. I attached licence manager status screenshot.

Thank you!

TPG_lic.jpg
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Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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HI @pierlum,

 

Could you check if you have a folder with the name containing hsc in the .runs folder. If yes do you have a vivado_hls.log file inside? Could you share it?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Explorer
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Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

thanks for the help.

This is the content of vivado_hls.log file

 

****** Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC v2018.2 (64-bit)
  **** SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018
  **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018
    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

INFO: [Common 17-1460] Use of init.tcl in C:/XilinxVivado2018_2/Vivado/2018.2/scripts/init.tcl is deprecated. Please use vivado_hls_init.tcl 
Sourcing tcl script 'C:/XilinxVivado2018_2/Vivado/2018.2/scripts/init.tcl'
invalid command name "enable_beta_device*"
    while executing
"enable_beta_device*"
    (file "C:/XilinxVivado2018_2/Vivado/2018.2/scripts/init.tcl" line 2)
INFO: [Common 17-206] Exiting vivado_hls at Thu Aug 30 10:55:37 2018...

Thank you!

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Moderator
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Registered: ‎11-09-2015

Re: VPSS 2.0 doesn't syntetize

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HI @pierlum,

 

Do you have the file? Can you share it?

C:/XilinxVivado2018_2/Vivado/2018.2/scripts/init.tcl

 Or do you have any vivado_init.tcl?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Explorer
Explorer
1,107 Views
Registered: ‎05-30-2017

Re: VPSS 2.0 doesn't syntetize

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Hi @florentw,

Removing "enable_beta_device*" from init.tcl seems to have solved the problem. Now I can succesfully generate output products of VPSS.

 

However this was my init.tcl file before edit it:

set_param general.maxThreads 8
enable_beta_device*

Thank you very much help!!

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