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Observer cbranson
Observer
6,479 Views
Registered: ‎09-12-2007

Version Conflict? WinXP, ISE 9.1, SysGen 9.2, Virtex2P50 ff1152

I am trying out System Generator currently.  I used it to create a design that included FIFOs and Binary counters.  I exported the design targeted to the Virtex2P50 ff 1152.  I then connected the created functional design block into my design and received the following errors when ngdbuild.exe was running during the translate process:
 
ERROR:NgdBuild:604 - logical block 'ref/Padder_B/fifo/comp0.core_instance0' with
   type 'fifo_s50_v2p_a1bf39bc6cdb1eff' could not be resolved. A pin name
   misspelling can cause this, a missing edif or ngc file, or the misspelling of
   a type name. Symbol 'fifo_s50_v2p_a1bf39bc6cdb1eff' is not supported in
   target 'virtex2p'.
ERROR:NgdBuild:604 - logical block 'ref/Padder_B/pixels/comp1.core_instance1'
   with type 'binary_counter_virtex2p_7_0_21abac477fd2dfdb' could not be
   resolved. A pin name misspelling can cause this, a missing edif or ngc file,
   or the misspelling of a type name. Symbol
   'binary_counter_virtex2p_7_0_21abac477fd2dfdb' is not supported in target
   'virtex2p'.
ERROR:NgdBuild:604 - logical block 'ref/Padder_B/rows/comp0.core_instance0' with
   type 'binary_counter_virtex2p_7_0_0e2e21b5f5b3ea75' could not be resolved. A
   pin name misspelling can cause this, a missing edif or ngc file, or the
   misspelling of a type name. Symbol
   'binary_counter_virtex2p_7_0_0e2e21b5f5b3ea75' is not supported in target
   'virtex2p'.
ERROR:NgdBuild:604 - logical block 'ref/Padder_A/fifo/comp0.core_instance0' with
   type 'fifo_s50_v2p_a1bf39bc6cdb1eff' could not be resolved. A pin name
   misspelling can cause this, a missing edif or ngc file, or the misspelling of
   a type name. Symbol 'fifo_s50_v2p_a1bf39bc6cdb1eff' is not supported in
   target 'virtex2p'.
ERROR:NgdBuild:604 - logical block 'ref/Padder_A/pixels/comp1.core_instance1'
   with type 'binary_counter_virtex2p_7_0_21abac477fd2dfdb' could not be
   resolved. A pin name misspelling can cause this, a missing edif or ngc file,
   or the misspelling of a type name. Symbol
   'binary_counter_virtex2p_7_0_21abac477fd2dfdb' is not supported in target
   'virtex2p'.
ERROR:NgdBuild:604 - logical block 'ref/Padder_A/rows/comp0.core_instance0' with
   type 'binary_counter_virtex2p_7_0_0e2e21b5f5b3ea75' could not be resolved. A
   pin name misspelling can cause this, a missing edif or ngc file, or the
   misspelling of a type name. Symbol
   'binary_counter_virtex2p_7_0_0e2e21b5f5b3ea75' is not supported in target
   'virtex2p'.
 
 
It seems that it could be System Generator putting in a refrenece that is not valid to ISE 9.1?  Any suggestions?  I would like to change to System Generator 9.1 so that I could have matching versions however I have not found it available for download anywhere on Xilinx's website.
 
Thanks,
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1 Reply
Xilinx Employee
Xilinx Employee
6,475 Views
Registered: ‎08-07-2007

Re: Version Conflict? WinXP, ISE 9.1, SysGen 9.2, Virtex2P50 ff1152

Depending on the blocks used System Generator generates cores with CoreGen as part of the HDL netlist.  These core netlists need to be accessable during implementation of your new top level module. 

See answer record 11701 for details on this error message:
http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=11701

You can use the Translate option "Macro Search path" to point to the System Generator netlist directory where the netlists reside. 

Another option is to use the NGC Netlist Compilation target from System Generator which will generate a single netlist file that can be wrapped up in your top level module and you don't need to worry about the various HDL and netlist files.  Take a look at the System Generator User Guide under "System Generator Compilation Types" for details.


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